• Journal of electromagnetic engineering and science
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• v.9 no.2
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• pp.71-77
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• 2009

OFDM(Orthogonal Frequency Division Multiplexing) signals sutler serious nonlinear distortion in the nonlinear HPA(High Power Amplifier) because of high PAPR(Peak Average Power Ratio). Nonlinear distortion can be improved by a pre-distorter, but this pre-distorter is insufficient when the PAPR is very high in an OPFDM system. In this paper, a DFT(Discrete Fourier Transform) transform technique is introduced for PAPR reduction. It is especially important to consider the memory effect of HPA for more precise predistortion. Therefore, in this paper, we consider two models, the TWTA(Traveling-Wave Tube Amplifier) model of Saleh without a memory effect and the HPA memory polynomial model that has a memory effect. We design a pre-distorter and an adaptive pre-distorter that uses the NLMS(Normalized Least Mean Square) algorithm for the compensation of this nonlinear distortion. Without the consideration of a memory effect, the system performance would be degraded, even if the pre-distorter is used for the compensation of the nonlinear distortion. From the simulation results, we can confirm that the proposed system shows an improvement in performance.

• Communications of the Korean Mathematical Society
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• v.38 no.3
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• pp.943-966
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• 2023

In this paper, we study the initial-boundary value problem for viscoelastic wave equations of Kirchhoff type with Balakrishnan-Taylor damping terms in the presence of the infinite memory and external time-varying delay. For a certain class of relaxation functions and certain initial data, we prove that the decay rate of the solution energy is similar to that of relaxation function which is not necessarily of exponential or polynomial type. Also, we show another stability with g satisfying some general growth at infinity.

• Journal of KIISE:Software and Applications
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• v.32 no.8
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• pp.819-833
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• 2005

Code size reduction is ever becoming more important for compilers targeting embedded processors because these processors are often severely limited by storage constraints and thus the reduced code size can have a positively significant Impact on their performance. Various code size reduction techniques have different motivations and a variety of application contexts utilizing special hardware features of their target processors. In this work, we propose a novel technique that fully utilizes a set of hardware instructions, called the multiple load/store (MLS), that are specially featured for reducing code size by minimizing the number of memory operations in the code. To take advantage of this feature, many microprocessors support the MLS instructions, whereas no existing compilers fully exploit the potential benefit of these instructions but only use them for some limited cases. This is mainly because optimizing memory accesses with MLS instructions for general cases is an NP-hard problem that necessitates complex assignments of registers and memory off-sets for variables in a stack frame. Our technique uses a couple of heuristics to efficiently handle this problem in a polynomial time bound.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.3
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• pp.16-33
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• 1993

New decoding algorithm of double-error-correction Reed-Solmon codes over GF(2$^{8}$) for optical compact disks is proposed and decoding algorithm of RS codes with triple-error-correcting capability is presented in this paper. First of all. efficient algorithms for estimating the number of errors in the received code words are presented. The most complex circuits in the RS decoder are parts for soving the error-location numbers from error-location polynomial, so the complexity of those circuits has a great influence on overall decoder complexity. One of the most known algorithm for searching the error-location number is Chien's method, in which all the elements of GF(2$^{m}$) are substituted into the error-location polynomial and the error-location number can be found as the elements satisfying the error-location polynomial. But Chien's scheme needs another 1 frame delay in the decoder, which reduces decoding speed as well as require more stroage circuits for the received ocode symbols. The ther is Polkinghorn method, in which the roots can be resolved directly by solving the error-location polynomial. Bur this method needs additional ROM (readonly memory) for storing tthe roots of the all possible coefficients of error-location polynomial or much more complex cicuit. Simple, efficient, and high speed method for solving the error-location number and decoding algorithm of double-error correction RS codes which reudce considerably the complexity of decoder are proposed by using Hilbert theorems in this paper. And the performance of the proposed decoding algorithm is compared with that of conventional decoding algorithms. As a result of comparison, the proposed decoding algorithm is superior to the conventional decoding algorithm with respect to decoding delay and decoder complexity. And decoding algorithm of RS codes with triple-error-correcting capability is presented, which is suitable for error-correction in digital audio tape, also.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.83-84
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• 2008

It is efficient to use the time-domain beamforming to operate the various pulse with the different pulse length, frequency, bandwidth in active sonar system. In this paper, we propose a time-domain beamformer with the cumulative processing in the decomposed channel using the polynomial interpolation to solve the problem of the computational cost, high transmission data rate, and the lack of internal memory.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2001.05a
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• pp.672-675
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• 2001

In this paper, we propose that the calculation method for accurate wind speed using interpolation methods, and the finding method for accurate wind direction using interpolation polynomial, so we make better performance for 3-Cup Anemometer by the proposed methods. We embody the 3-Cup Anemometer with photo sensor to measure wind direction and wind speed. In order to more accurate wind speed and wind direction, we present the methods to overcome the limitations of system memory and of the sensor measurement error by 8 bit gray code (as substitute 360 degrees for 256 degrees data).

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37A no.10
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• pp.827-833
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• 2012

The receiver performance is degraded by nonlinear memory problem in communication system. The pre-distorter techniques are an effective technique to compensate for the nonlinear distortion of the HPA without memory effects. However, memory effect of HPA can no longer be ignored when data signal is transmitted in high speed. Many adaptive pre-distorter schemes have been studied to compensate for memory effect problem of HPA in transmitter. The complexity and cost of satellite will increase when using adaptive pre-distorter in satellite communication system. In this paper, we propose receiver feedback closed loop pre-distortion technique in order to compensate for nonlinear problem of HPA with memory problem. The purpose of this paper is to reduce complexity and cost of satellite design by using only pre-distorter at terrestrial station.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.425-426
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• 2006

Overdriving schemes are used to improve the response time of liquid crystal display. Typically they are implemented by using LUTs (look-up table) within an image processor. However, the size of LUT is limited by the physical memory size and system cost. In this paper, we present an improved method for LUT implementation using linear interpolation and piecewise least-square polynomial regression. Using the proposed method, the performance of LUT can be improved and memory size of that can be reduced.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.05a
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• pp.762-763
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• 2016

In realizing a homomorphic encryption system, the operations of encrypt, decypt, and recrypt constitute major portions. The most important common operation for each back-bone operations include a polynomial modulo multiplication for over million-bit integers, which can be obtained by performing integer Fourier transform, also known as number theoretic transform. In this paper, we adopt and modify an algorithm for calculating big integer multiplications introduced by Schonhage-Strassen to propose an efficient algorithm which can save memory. The proposed architecture of number theoretic transform has been implemented on an FPGA and evaluated.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.10C
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• pp.614-620
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• 2011

RSA, the most commonly used public-key cryptosystem, is based on the difficulty of factoring very large integers. The fastest known factoring algorithm is the Number Field Sieve(NFS). NFS first chooses two polynomials having common root modulo N and consists of the following four major steps; 1. Polynomial Selection 2. Sieving 3. Matrix 4. Square Root, of which the most time consuming step is the Sieving step. However, in recent years, the importance of the Polynomial Selection step has been studied widely, because one can save a lot of time and memory in sieving and matrix step if one chooses optimal polynomial for NFS. One of the ideal ways of choosing sieving polynomial is to choose two polynomials with same degree. Montgomery proposed the method of selecting two (nonlinear) quadratic sieving polynomials. We proposed two cubic polynomials using 5-term geometric progression.