• 제목/요약/키워드: Mask material

검색결과 265건 처리시간 0.029초

Fabrication of low-stress silicon nitride film for application to biochemical sensor array

  • 손영수
    • 센서학회지
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    • 제14권5호
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    • pp.357-361
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    • 2005
  • Low-stress silicon nitride (LSN) thin films with embedded metal line have been developed as free standing structures to keep microspheres in proper locations and localized heat source for application to a chip-based sensor array for the simultaneous and near-real-time detection of multiple analytes in solution. The LSN film has been utilized as a structural material as well as a hard mask layer for wet anisotropic etching of silicon. The LSN was deposited by LPCVD (Low Pressure Chemical Vapor Deposition) process by varing the ratio of source gas flows. The residual stress of the LSN film was measured by laser curvature method. The residual stress of the LSN film is 6 times lower than that of the stoichiometric silicon nitride film. The test results showed that not only the LSN film but also the stack of LSN layers with embedded metal line could stand without notable deflection.

프르브유닛 소자용 블레이드형 팁 제조방법 (A Fabrication Method of Blade Type Tip for Probe Unit Device)

  • 이근우;이재홍;김창교
    • 전기학회논문지
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    • 제56권8호
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    • pp.1436-1440
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    • 2007
  • Beryllium copper has been known to be an important material for the various fields of industry because it can be used for mechanical and electrical/electronic components that are subjected to elevated temperatures (up to $400^{\circ}C$ for short times). Blade type tip for probing the cells of liquid crystal display(LCD) was fabricated using beryllium copper foil. The dry film resist was employed as a mask for patterning of the blade type tip. The beryllium copper foil was etched using hydrochloric acidic iron-chloride solution. The concentration, temperature, and composition ratio of hydrochloric acidic iron-chloride solution affect the etching characteristics of beryllium copper foil. Nickel with the thickness of $3{\mu}m$ was electroplated on the patterned copper beryllium foil for enhancing its hardness, followed by electroplating gold for increasing its electrical conductivity. Finally, the dry film resist on the bridge was removed and half of the nickel was etched to complete the blade type tip.

Determination of Optical Constants of Thin Films in Extreme Ultraviolet Wavelength Region by an Indirect Optical Method

  • Kang, Hee Young;Lim, Jai Dong;Peranantham, Pazhanisami;HwangBo, Chang Kwon
    • Journal of the Optical Society of Korea
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    • 제17권1호
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    • pp.38-43
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    • 2013
  • In this study, we propose a simple and indirect method to determine the optical constants of Mo and ITO thin films in the extreme ultraviolet (EUV) wavelength region by using X-ray reflectometry (XRR) and Rutherford backscattering spectrometry (RBS). Mo and ITO films were deposited on silicon substrates by using an RF magnetron sputtering method. The density and the composition of the deposited films were evaluated from the XRR and RBS analysis, respectively and then the optical constants of the Mo and ITO films were determined by an indirect optical method. The results suggest that the indirect method by using the XRR and RBS analysis will be useful to search for suitable high absorbing EUVL mask material quickly.

Design and performance prediction of large-area hybrid gamma imaging system (LAHGIS) for localization of low-level radioactive material

  • Lee, Hyun Su;Kim, Jae Hyeon;Lee, Junyoung;Kim, Chan Hyeong
    • Nuclear Engineering and Technology
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    • 제53권4호
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    • pp.1259-1265
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    • 2021
  • In the present study, a large-area hybrid gamma imaging system was designed by adopting coded aperture imaging on the basis of a large-area Compton camera to achieve high imaging performance throughout a broad energy range (100-2000 keV). The system consisting of a tungsten coded aperture mask and monolithic NaI(Tl) scintillation detectors was designed through a series of Geant4 Monte Carlo radiation transport simulations, in consideration of both imaging sensitivity and imaging resolution. Then, the performance of the system was predicted by Geant4 Monte Carlo simulations for point sources under various conditions. Our simulation results show that the system provides very high imaging sensitivity (i.e., low values for minimum detectable activity, MDA), thus allowing for imaging of low-activity sources at distances impossible with coded aperture imaging or Compton imaging alone. In addition, the imaging resolution of the system was found to be high (i.e., around 6°) over the broad energy range of 59.5-1330 keV.

잉크젯 프린팅 원리를 적용한 디스플레이 기술 개발 동향 (Trends in Display Technology Development Applying Inkjet Printing Principles)

  • 권병화;주철웅
    • 전자통신동향분석
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    • 제38권1호
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    • pp.26-35
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    • 2023
  • Inkjet printing is a typical printing technology with many advantages, such as material cost reduction, noncontact pattern formation without a mask, and process simplification. With the recent and rapid development of ink materials, parts and equipment, and process technologies related to inkjet printing, it is becoming a major process in various areas of the display industry. In particular, for the QD-OLED (quantum dot-organic light-emitting diode) display announced by Samsung Display in 2022, quantum dot pixel production by applying inkjet printing is a key technology. We analyze inkjet printing technology for mass production applied to the display industry and discuss the technology development trends in academia and industry toward the realization of next-generation displays.

Simultaneous Transfer and Patterning of CVD-Grown Graphene with No Polymeric Residues by Using a Metal Etch Mask

  • 장미;정진혁;;이내응
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.642-642
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    • 2013
  • Graphene, two dimensional single layer of carbon atoms, has tremendous attention due to its superior property such as high electron mobility, high thermal conductivity and optical transparency. Especially, chemical vapor deposition (CVD) grown graphene has been used as a promising material for high quality and large-scale graphene film. Unfortunately, although CVD-grown graphene has strong advantages, application of the CVD-grown graphene is limited due to ineffective transfer process that delivers the graphene onto a desired substrate by using polymer support layer such as PMMA(polymethyl methacrylate). The transferred CVD-grown graphene has serious drawback due to remaining polymeric residues generated during transfer process, which induces the poor physical and electrical characteristics by a p-doping effect and impurity scattering. To solve such issue incurred during polymer transfer process of CVD-grown graphene, various approaches including thermal annealing, chemical cleaning, mechanical cleaning have been tried but were not successful in getting rid of polymeric residues. On the other hand, lithographical patterning of graphene is an essential step in any form of microelectronic processing and most of conventional lithographic techniques employ photoresist for the definition of graphene patterns on substrates. But, application of photoresist is undesirable because of the presence of residual polymers that contaminate the graphene surface consistent with the effects generated during transfer process. Therefore, in order to fully utilize the excellent properties of CVD-grown graphene, new approach of transfer and patterning techniques which can avoid polymeric residue problem needs to be developed. In this work, we carried out transfer and patterning process simultaneously with no polymeric residue by using a metal etch mask. The patterned thin gold layer was deposited on CVD-grown graphene instead of photoresists in order to make much cleaner and smoother surface and then transferred onto a desired substrate with PMMA, which does not directly contact with graphene surface. We compare the surface properties and patterning morphology of graphene by scanning electron microscopy (SEM), atomic force microscopy(AFM) and Raman spectroscopy. Comparison with the effect of residual polymer and metal on performance of graphene FET will be discussed.

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TML 방법에 의한 우주환경에서의 인공위성 부품 탈기체 특성에 관한 연구

  • 정성인;박홍영;유상문;오대수;이현우;임종태
    • 한국우주과학회:학술대회논문집(한국우주과학회보)
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    • 한국우주과학회 2003년도 한국우주과학회보 제12권2호
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    • pp.62-62
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    • 2003
  • 과학위성 1호에는 위성의 임무를 수행하기 위하여 광학계, 구조부, 및 전자부 등 여러가지 부품들이 실장되는데, 그 중 전자부의 가장 중요한 부품 중의 하나인 인쇄회로기판(Printed Circuit Board, PCB)의 우주환경에서의 특성 대해서 논의하고자 한다. Solder Resistor(Solder Mask)의 화학성분이 위성체가 작동하는 우주환경에서 위성체 임무수행 시 발생할 수 있는 out-gassing으로 인해 위성체가 본연의 임무 실패라는 결과를 초래할 수 있다 NASA 및 ESA의 Out-gassing에 관한 규정과 TRW에 의한 KOMSAT에 사용된 재료의 진공상태의 Outgassing에 관한 내용에 의하면, 재료의 진공상태와 Out-gassing은 America Society for Testing and Materials에서 제시한 ASTM E959 기준에 따라 제작된다. 일반적으로 우주 환경에서 광학계나 전자부의 원활한 동작을 위해서는 인쇄 회로 기판의 총 질량손실(Total Mass Loss, TML)은 1.00%을 넘지 말아야 하며, 휘발성 응축 질량 (Collected Volatile Condensable Mass, CVCM)은 0.1% 미만이어야 한다. Total Mass Loss(TML) 방법은 대기중에서 측정한 질량과 진공 조건에서 변화되는 질량을 측정함으로써 진공조건에서의 탈기체 특성을 측정하는 방법이다. 본 연구에서는 Solder Resistor(Solder Mask)의 탈기체 측정을 위한 진공챔버의 측정방법 및 진공 형성 과정을 기술하고 실제 과학위성1호에 장착될 시료를 예로 들어 인쇄회로기판에 입힌 Solder Resistor(Solder Mask)가 우주환경인 진공상태에서 위성체 부품의 작동 시 발생할 수 있는 탈기체되는 정도를 질량의 변화분으로 측정하여 위성체가 우주 환경에서 본연의 임무를 안전하게 수행할 있는지를 검증하였다.부분이다.다.향을 해석하고 시뮬레이션 하였다.Device Controller)는 ECU로부터 명령어를 받아서 arm 및 safe 상태에 대한 텔리 메트리 데이터를 제공한다 그리고, SAR(Solar Array Regulator)는 ECU로부터 Bypass Relay 및 ARM Relay에 관한 명령어를 받아 수행되며 그에 따른 텔리 메트리 데이터를 제공한다. 마지막으로 EPS 소프트웨어를 검증하는 EPS Software Verification을 수행하였다 전력계 소프트웨어의 설계의 검증 부분은 현재 설계 제작된 전력계 .소프트웨어의 동작 특성 이 위성 의 전체 운용개념과 연계하여 전력계 소프트웨어가 전력계 및 위성체의 요구조건을 만족시키는지를 확인하는데 있다. 전력계 운용 소프트웨어는 배터리의 충ㆍ방전을 효율적으로 관리해 3년의 임무 기간동안 위성체에 전력을 공급할 수 있도록 설계되어 있다this hot-core has a mass of 10sR1 which i:s about an order of magnitude larger those obtained by previous studies.previous studies.업순서들의 상관관계를 고려하여 보다 개선된 해를 구하기 위한 연구가 요구된다. 또한, 준비작업비용을 발생시키는 작업장의 작업순서결정에 대해서도 연구를 행하여, 보완작업비용과 준비비용을 고려한 GMMAL 작업순서문제를 해결하기 위한 연구가 수행되어야 할 것이다.로 이루어 져야 할 것이다.태를 보다 효율적으로 증진시킬 수 있는 대안이 마련되어져야 한다고 사료된다.$\ulcorner$순응$\lrcorner$의 범위를 벗어나지 않는다. 그렇기 때문에도 $\ulcorner$순응$\lrcorner$$\ulcorner$표현$\lrcorner$의 성격과 형태를 외형상으로

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Copper Interconnection and Flip Chip Packaging Laboratory Activity for Microelectronics Manufacturing Engineers

  • Moon, Dae-Ho;Ha, Tae-Min;Kim, Boom-Soo;Han, Seung-Soo;Hong, Sang-Jeen
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.431-432
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    • 2012
  • In the era of 20 nm scaled semiconductor volume manufacturing, Microelectronics Manufacturing Engineering Education is presented in this paper. The purpose of microelectronic engineering education is to educate engineers to work in the semiconductor industry; it is therefore should be considered even before than technology development. Three Microelectronics Manufacturing Engineering related courses are introduced, and how undergraduate students acquired hands-on experience on Microelectronics fabrication and manufacturing. Conventionally employed wire bonding was recognized as not only an additional parasitic source in high-frequency mobile applications due to the increased inductance caused from the wiring loop, but also a huddle for minimizing IC packaging footprint. To alleviate the concerns, chip bumping technologies such as flip chip bumping and pillar bumping have been suggested as promising chip assembly methods to provide high-density interconnects and lower signal propagation delay [1,2]. Aluminum as metal interconnecting material over the decades in integrated circuits (ICs) manufacturing has been rapidly replaced with copper in majority IC products. A single copper metal layer with various test patterns of lines and vias and $400{\mu}m$ by $400{\mu}m$ interconnected pads are formed. Mask M1 allows metal interconnection patterns on 4" wafers with AZ1512 positive tone photoresist, and Cu/TiN/Ti layers are wet etched in two steps. We employed WPR, a thick patternable negative photoresist, manufactured by JSR Corp., which is specifically developed as dielectric material for multi- chip packaging (MCP) and package-on-package (PoP). Spin-coating at 1,000 rpm, i-line UV exposure, and 1 hour curing at $110^{\circ}C$ allows about $25{\mu}m$ thick passivation layer before performing wafer level soldering. Conventional Si3N4 passivation between Cu and WPR layer using plasma CVD can be an optional. To practice the board level flip chip assembly, individual students draw their own fan-outs of 40 rectangle pads using Eagle CAD, a free PCB artwork EDA. Individuals then transfer the test circuitry on a blank CCFL board followed by Cu etching and solder mask processes. Negative dry film resist (DFR), Accimage$^{(R)}$, manufactured by Kolon Industries, Inc., was used for solder resist for ball grid array (BGA). We demonstrated how Microelectronics Manufacturing Engineering education has been performed by presenting brief intermediate by-product from undergraduate and graduate students. Microelectronics Manufacturing Engineering, once again, is to educating engineers to actively work in the area of semiconductor manufacturing. Through one semester senior level hands-on laboratory course, participating students will have clearer understanding on microelectronics manufacturing and realized the importance of manufacturing yield in practice.

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Effect of Hole-Transporting Layer and Solvent in Solution Processed Highly-Efficient Small Molecule Organic Light-Emitting Diodes

  • Jo, Min-Jun;Hwang, Won-Tae;Chae, Hee-Yeop
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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    • pp.250-250
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    • 2012
  • Organic light-emitting diodes (OLED) and polymer light emitting diodes (PLED) have been regarded as the candidate for the next generation light source and flat panel display. Currently, the most common OLED industrial fabrication technology used in producing real products utilizes a fine shadow mask during the thermal evaporation of small molecule materials. However, due to high potential including low cost, easy process and scalability, various researches about solution process are progressed. Since polymer has some disadvantages such as short lifetime and difficulty of purifying, small molecule OLED (SMOLED) can be a good alternative. In this work, we have demonstrated high efficient solution-processed OLED with small molecule. We use CBP (4,4'-N,N'-dicarbazolebiphenyl) as a host doped with green dye (Ir(ppy)3 (fac-tris(2-phenyl pyridine) iridium)). PBD (2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole) and TPD (N,N'diphenyl-N,N'-Bis (3-methylphenyl)-[1,1-biphenyl]-4,4'-diamine) are employed as an electron transport material and a hole transport material. And TPBi (2,2',2''-(1,3,5-phenylene) tris (1-phenyl-1H-benzimidazole)) is used as an hole blocking layer for proper hole and electron balance. With adding evaporated TPBi layer, the current efficiency was very improved. Among various parameters, we observed the property of OLED device by changing the thickness of hole transporting layer and solvent which can dissolve organic material. We could make small molecule OLED device with finding proper conditions.

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페로브스카이트 반도체 물질에 원형 패턴을 형성하기 위한 상압플라즈마 식각 기술 (Atmospheric Pressure Plasma Etching Technology for Forming Circular Holes in Perovskite Semiconductor Materials)

  • 김무진
    • 융합정보논문지
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    • 제11권2호
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    • pp.10-15
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    • 2021
  • 본 논문에서는 먼저 습식 코팅 방법으로 페로브스카이트 (CH3NH3PbI3) 박막을 글라스 상에 형성하고, 다양한 분석 기법을 이용하여 막의 두께, 표면거칠기, 결정성, 구성성분 및 가시광 영역에서의 이 물질의 반응에 대해 논한다. 완성된 반도체 물질은 막내부에 결함(defect)이 없고 균일하며, 표면거칠기는 매우 작으며, 가시광영역에서 높은 흡수율이 관찰되었다. 다음으로 이와 같이 형성된 유무기 층에 hole 형상을 구현하기 위하여, 구멍이 일정한 간격으로 있는 메탈마스크, 페로브스카이트 물질이 코팅되어 있는 유리, 자석 순서로 되어있는 구조의 샘플을 상압플라즈마 공법을 이용하여 시간에 따른 물질에 형성되는 hole 형태의 변화를 분석하였다. 시간이 길어짐에 따라 더 많이 식각되는 것을 알 수 있으며, 이 중에서 공정 시간을 가장 오래한 샘플에 대해서는 보다 자세하게 살펴보았고, 플라즈마의 위치에 따른 차이에 의해 7영역으로 분류할 수 있었다.