• Title/Summary/Keyword: MOSFET's Driver

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The Design of CMOS-based High Speed-Low Power BiCMOS LVDS Transmitter (CMOS공정 기반의 고속-저 전압 BiCMOS LVDS 구동기 설계)

  • Koo, Yong-Seo;Lee, Jae-Hyun
    • Journal of IKEEE
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    • v.11 no.1 s.20
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    • pp.69-76
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    • 2007
  • This paper presents the design of LVDS (Low-Voltage-Differential-Signaling) transmitter for Gb/s-per-pin operation. The proposed LVDS transmitter is designed using BiCMOS technology, which can be compatible with CMOS technology. To reduce chip area and enhance the robustness of LVDS transmitter, the MOS switches of transmitter are replaced with lateral bipolar transistor. The common emitter current gain($\beta$) of designed bipolar transistor is 20 and the cell size of LVDS transmitter is $0.01mm^2$. Also the proposed LVDS driver is operated at 1.8V and the maximum data rate is 2.8Gb/s approximately In addition, a novel ESD protection circuit is designed to protect the ESD phenomenon. This structure has low latch-up phenomenon by using turn on/off character of P-channel MOSFET and low triggering voltage by N-channel MOSFET in the SCR structure. The triggering voltage and holding voltage are simulated to 2.2V, 1.1V respectively.

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Design of 2.5 Gbps CMOS LD driver (2.5 Gbps CMOS LD 구동기 설계)

  • Kim Kyung-Min;Choi Jin-Ho;Choi Young-Wan;Jo Won-Jin
    • 한국정보통신설비학회:학술대회논문집
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    • 2004.08a
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    • pp.37-40
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    • 2004
  • 본 논문에서는 $0.35{\mu}m$ CMOS공정을 이용하여 2.5 Gbps로 동작하는 LD(Laser Diode) 구동기를 설계하였다. 전기 신호를 광 신호로 변환시켜 주는 레이저 다이오드(LD)를 동작시키기 위해서는 LD 구동기가 필요하게 되며, LD 구동기는 크게 LD 문턱전류 이상의 전류를 공급하기 위한 바이어스부와 바이어스 전류를 기반으로 전기신호를 광신호로 변조하는 변조부로 나뉘어 진다. 설계한 LD 구동기는 LD의 등가회로를 이용하여 모의실험 과정을 거쳤으며, MOSFET의 GATE단에 안정된 입력전압을 인가함으로써 안정된 바이어스 전류의 공급을 꾀하였다. 디자인된 LD 구동기는 11 mA 정도의 바이어스 전류를 공급하여 주었으며, 4 mA 정도의 변조전류를 공급한다.

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A Study on the Design of Green Mode Power Switch IC (그린 모드 파워 스위치 IC 설계에 관한 연구)

  • Lee, Woo-Ram;Son, Sang-Hee;Chung, Won-Sup
    • Journal of IKEEE
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    • v.14 no.2
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    • pp.1-8
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    • 2010
  • In this paper, Green Mode Power IC is designed to reduce the standby power. The proposed and designed IC works for the Switch Mode Power Supply(SMPS) and has the function of PWM. To reduce the unnecessary electric power, burst mode and skip mode section are introduced and controlled by external power MOSFET to diminish the standby power. The proposed IC is designed and simulated by KEC 30V-High Voltage 0.5um CMOS Process. The structure of proposed IC is composed of voltage regulator circuit, voltage reference circuit, UVLO(Under Voltage Lock out) circuit, Ibias circuit, green circuit, PWM circuit, OSC circuit, protection circuit, control circuit, and level & driver circuit. Measuring the current consumption of each block from the simulation results, 1.2942 mA of the summing consumption current from each block is calculated and ot proved that it is within the our design target of 1.3 mA. The current consumption of the proposed IC in this paper is less than a half of conventional ICs, and power consumption is reduced to the extent of 1W in standby mode. From the above results, we know that efficiency of proposed IC is superior to the previous IC.

Design and Implementation of PIC/FLC plus SMC for Positive Output Elementary Super Lift Luo Converter working in Discontinuous Conduction Mode

  • Muthukaruppasamy, S.;Abudhahir, A.;Saravanan, A. Gnana;Gnanavadivel, J.;Duraipandy, P.
    • Journal of Electrical Engineering and Technology
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    • v.13 no.5
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    • pp.1886-1900
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    • 2018
  • This paper proposes a confronting feedback control structure and controllers for positive output elementary super lift Luo converters (POESLLCs) working in discontinuous conduction mode (DCM). The POESLLC offers the merits like high voltage transfer gain, good efficiency, and minimized coil current and capacitor voltage ripples. The POESLLC working in DCM holds the value of not having right half pole zero (RHPZ) in their control to output transfer function unlike continuous conduction mode (CCM). Also the DCM bestows superlative dynamic response, eliminates the reverse recovery troubles of diode and retains the stability. The proposed control structure involves two controllers respectively to control the voltage (outer) loop and the current (inner) loop to confront the time-varying ON/OFF characteristics of variable structured systems (VSSs) like POESLLC. This study involves two different combination of feedback controllers viz. the proportional integral controller (PIC) plus sliding mode controller (SMC) and the fuzzy logic controller (FLC) plus SMC. The state space averaging modeling of POESLLC in DCM is reviewed first, then design of PIC, FLC and SMC are detailed. The performance of developed controller combinations is studied at different working states of the POESLLC system by MATLAB-Simulink implementation. Further the experimental corroboration is done through implementation of the developed controllers in PIC 16F877A processor. The prototype uses IRF250 MOSFET, IR2110 driver and UF5408 diodes. The results reassured the proficiency of designed FLC plus SMC combination over its counterpart PIC plus SMC.