• Journal of Communications and Networks
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• 제16권6호
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• pp.639-644
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• 2014

In low-density parity-check (LDPC) coded multiple-input multiple-output (MIMO) communication systems, probabilistic information are exchanged between an LDPC decoder and a MIMO detector. TheMIMO detector has to calculate probabilistic values for each bit which can be very complex. In [1], the authors presented a class of linear block codes named low-density MIMO codes (LDMC) which can reduce the complexity of MIMO detector. However, this code only supports the outer-iterations between the MIMO detector and decoder, but does not support the inner-iterations inside the LDPC decoder. In this paper, a new approach to construct LDMC codes is introduced. The new LDMC codes can be encoded efficiently at the transmitter side and support both of the inner-iterations and outer-iterations at the receiver side. Furthermore they can achieve the design rates and perform very well over MIMO channels.

• ETRI Journal
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• 제38권1호
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• pp.100-111
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• 2016

This paper presents a low-complexity channel-adaptive reconfigurable $4{\times}4$ QR-decomposition and M-algorithm-based maximum likelihood detection (QRM-MLD) multiple-input and multiple-output (MIMO) detector. Two novel design approaches for low-power QRM-MLD hardware are proposed in this work. First, an approximate survivor metric (ASM) generation technique is presented to achieve considerable computational complexity reduction with minor BER degradation. A reconfigurable QRM-MLD MIMO detector (where the M-value represents the number of survival branches in a stage) for dynamically adapting to time-varying channels is also proposed in this work. The proposed reconfigurable QRM-MLD MIMO detector is implemented using a Samsung 65 nm CMOS process. The experimental results show that our ASM-based QRM-MLD MIMO detector shows a maximum throughput of 288 Mbps with a normalized power efficiency of 10.18 Mbps/mW in the case of $4{\times}4$ MIMO with 64-QAM. Under time-varying channel conditions, the proposed reconfigurable MIMO detector also achieves average power savings of up to 35% while maintaining a required BER performance.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권2호
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• pp.255-266
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• 2015

In this paper, a low-complexity and low-power soft output multiple input multiple output (MIMO) symbol detector is proposed for mobile devices with two transmit and two receive antennas. The proposed symbol detector can support both the spatial multiplexing mode and spatial diversity mode in single hardware and shows the optimal maximum likelihood (ML) performance. By applying a multi-stage pipeline structure and using a complex multiplier based on the polar-coordinate, the complexity of the proposed architecture is dramatically decreased. Also, by applying a clock-gating scheme to the internal modules for MIMO modes, the power consumption is also reduced. The proposed symbol detector was designed using a hardware description language (HDL) and implemented using a 65nm CMOS standard cell library. With the proposed architecture, the proposed MIMO detector takes up an area of approximately $0.31mm^2$ with 183K equivalent gates and achieves a 150Mbps throughput. Also, the power estimation results show that the proposed MIMO detector can reduce the power consumption by a maximum of 85% for the various test cases.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.447-448
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• 2008

This paper presents a low-complexity design and implementation results of a multi-input multi-output (MIMO) orthogonal frequency division multiplexing (OFDM) symbol detector for high speed wireless LAN (WLAN) systems. The proposed spatial division multiplexing (SDM) symbol detector is designed by HDL and synthesized to gate-level circuits using 0.18um CMOS library. The total gate count for the symbol detector is 238K.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제11권10호
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• pp.4738-4758
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• 2017

Resource allocation plays a crucial role in multiuser multiple input multiple output orthogonal frequency division multiplexing (MIMO-OFDM) systems to improve overall system performance. While previously proposed resource allocation algorithms are mainly designed from the point of view of the information-theoretic, we formulate the resource allocation problem as an average bit error rate (BER) minimization problem subject to a total power constraint when considering employing realistic MIMO detection techniques. Subsequently, we derive the optimal subcarrier and power allocation algorithms for three types of well-known MIMO detectors, including the maximum likelihood (ML) detector, linear detectors, and successive interference cancellation (SIC) detectors. To reduce the complexity, we also propose a two-step suboptimal algorithm that separates subcarrier and power allocation for each detector. We also analyze the diversity gain of the proposed suboptimal algorithms for various MIMO detectors. Simulation results confirm that the proposed suboptimal algorithm for each detector can achieve a comparable performance with the optimal allocation with a much lower complexity. Moreover, it is shown that the suboptimal algorithms perform better than the conventional algorithms that are known in the literature.

• 한국항행학회논문지
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• 제14권2호
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• pp.220-226
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• 2010

본 논문에서는 2개의 송 수신 안테나를 갖는 MIMO 통신 시스템을 위한 저전력 심볼 검출기의 구조를 제안한다. 제안된 심볼 검출기는 MIMO 전송 기법 중 공간 다이버시티(spatial diversity, SD) 모드뿐 아니라 공간 다중화(spatial multiplexing, SM) 모드를 모두 지원하며, ML 수준의 성능을 제공한다. 또한, 연산 블록의 공유와 MIMO 모드에 따라 구분되는 클럭 신호를 사용하여 하드웨어의 전력 소모량을 크게 감소시켰다. 제안된 하드웨어 구조는 하드웨어 설계 언어 (HDL)을 이용하여 설계되었고, $0.13{\mu}m$ CMOS standard 셀 라이브러리를 사용하여 합성되었다. 전력 소모량은 Synopsys Power CompilerTM을 사용하여 측정되었고, 그 결과 기존의 설계 구조대비 제안된 구조의 경우 최대 85%까지의 평균 소모 전력을 감소시킬 수 있음을 확인할 수 있었다.

• 대한전자공학회논문지TC
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• 제41권10호
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• pp.17-26
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• 2004

본 논문에서는 MIMO (Multiple-Input Multiple-Output) 시스템을 위한 JBSTBC (Joint Beamforming Space-Time Block Code) 기법에 대해 소개한다 제안된 기법은 부스트림간 간섭등의 열악한 페이딩 상관이 존재하는 경우에 공간 다이버시티 이득을 높이기 위해 블록순 계층적 검파기(block-ordered layered detector)와 함께 송수신 고유빔 형성기법을 적용하였다. 본 논문에서는 제안된 JBSTBC 기법의 성능을 분석하기 위하여 여러 경우의 채널 환경에서 모의실험을 수행하였으며, 이러한 영향을 분명히 하기 위해 자세한 수식적인 유도를 수행하였다.

• 한국전자파학회논문지
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• 제17권12호
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• pp.1164-1171
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• 2006

본 논문에서는 터보 처리 MIMO 시스템에서 시스템의 성능을 향상시키기 위해 기존의 선형 MMSE 검출기를 기반으로 간단한 비선형 MMSE 검출기를 유도하고 가우시안 근사화와 비선형 MMSE 검출기를 갖는 새로운 터보 처리 MIMO 시스템을 제안하였다. 터보 부호를 사용하는 터보 처리 MIMO 시스템에서 기존의 시스템과 제안된 시스템의 프레임 오율 성능을 살펴보면 1 % FER을 기준으로는 송신과 수신안테나 수를 각각 N과 M이라 할 때, M=N=4인 경우 제안된 시스템은 기존의 시스템보다 약 0.5 dB의 성능 향상을 갖고, M=N=8인 경우 제안된 시스템은 기존의 시스템보다 약 0.4 dB의 성능 향상을 갖는다. 또한 평균 외부 반복 횟수를 살펴보면 제안된 시스템이 기존의 시스템보다 낮은 수준을 보여주었다. 제안된 시스템의 비선형 MMSE 검출기가 수신신호의 측정값에 근거하여 부호화된 비트의 연 출력을 결정함으로써 심볼 값을 판정하는데 필요한 영역에서의 불확실한 부분을 줄였기 때문에 성능이 향상될 수 있었다.

• 한국통신학회논문지
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• 제39A권9호
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• pp.528-534
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• 2014

본 논문에서는 LDPC 부호화된 멀티유저 상향링크 massive-MIMO 시스템에서, 연판정 MRC 검출기와 LDPC 복호기를 이용한 반복적 검출 및 복호 수신기를 제안한다. 우선 MRC 검출기에 대해 연판정 기법을 제안하고, 검출기와 LDPC 복호기간 정보 교환 관계를 유도한다. 제안된 반복적인 검출 및 복호 과정을 통해 성능이 향상될 수 있음을 시뮬레이션을 통해 확인한다.

• ETRI Journal
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• 제39권3호
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• pp.326-335
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• 2017

In the uplink transmission of massive (or large-scale) multi-input multi-output (MIMO) systems, large dimensional signal detection and its hardware design are challenging issues owing to the high computational complexity. In this paper, we propose low-complexity hardware architectures of Richardson iterative method-based massive MIMO detectors. We present two types of massive MIMO detectors, directly mapped (type1) and reformulated (type2) Richardson iterative methods. In the proposed Richardson method (type2), the matrix-by-matrix multiplications are reformulated to matrix-vector multiplications, thus reducing the computational complexity from $O(U^2)$ to O(U). Both massive MIMO detectors are implemented using a 65 nm CMOS process and compared in terms of detection performance under different channel conditions (high-mobility and flat fading channels). The hardware implementation results confirm that the proposed type1 Richardson method-based detector demonstrates up to 50% power savings over the proposed type2 detector under a flat fading channel. The type2 detector indicates a 37% power savings compared to the type1 under a high-mobility channel.