Journal of Advanced Navigation Technology (한국항행학회논문지)

The Korean Navigation Institute (한국항행학회)
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Low Power Symbol Detector for MIMO Communication Systems

MIMO 통신 시스템을 위한 저전력 심볼 검출기 설계 연구

  • Hwang, You-Sun (School of Electronics, Telecommunication and Computer Eng., Korea Aerospace University) ;
  • Jang, Soo-Hyun (School of Electronics, Telecommunication and Computer Eng., Korea Aerospace University) ;
  • Jung, Yun-Ho (School of Electronics, Telecommunication and Computer Eng., Korea Aerospace University)
  • 황유선 (한국항공대학교 항공전자 및 정보통신 공학부) ;
  • 장수현 (한국항공대학교 항공전자 및 정보통신 공학부) ;
  • 정윤호 (한국항공대학교 항공전자 및 정보통신 공학부)
  • Received : 2010.04.06
  • Accepted : 2010.04.30
  • Published : 2010.04.30
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Abstract

In this paper, an low power symbol detector is proposed for MIMO communication system with two transmit and two receive antennas. The proposed symbol detector can support both the spatial multiplexing (SM) mode and spatial diversity (SD) mode for MIMO transmission technique, and shows the optimal maximum likelihood (ML) performance. Also, by sharing the hardware block and using the dedicated clock MIMO modes, the power of the proposed architecture is dramatically decreased. The proposed symbol detector was designed in hardware description language (HDL) and synthesized to logic gates using a $0.13-{\mu}m$ CMOS standard cell library. The power consumption was estimated by using Synopsys Power CompilerTM, which is reduced by maximum 85%, compared with the conventional architecture.

본 논문에서는 2개의 송 수신 안테나를 갖는 MIMO 통신 시스템을 위한 저전력 심볼 검출기의 구조를 제안한다. 제안된 심볼 검출기는 MIMO 전송 기법 중 공간 다이버시티(spatial diversity, SD) 모드뿐 아니라 공간 다중화(spatial multiplexing, SM) 모드를 모두 지원하며, ML 수준의 성능을 제공한다. 또한, 연산 블록의 공유와 MIMO 모드에 따라 구분되는 클럭 신호를 사용하여 하드웨어의 전력 소모량을 크게 감소시켰다. 제안된 하드웨어 구조는 하드웨어 설계 언어 (HDL)을 이용하여 설계되었고, $0.13{\mu}m$ CMOS standard 셀 라이브러리를 사용하여 합성되었다. 전력 소모량은 Synopsys Power CompilerTM을 사용하여 측정되었고, 그 결과 기존의 설계 구조대비 제안된 구조의 경우 최대 85%까지의 평균 소모 전력을 감소시킬 수 있음을 확인할 수 있었다.

Keywords

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