• Korean Management Science Review
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• v.13 no.2
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• pp.1-11
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• 1996

Two different methods to extract the license plate area of a vehicle have been used for automatic recognition purposes. One method is with a color vision system and the other is with an edge detecting operator. The system with color vision has some problems if the colors of license plate and vehicle's body are similar. The various plate colors in Korea also drops the system performance. The edge detecting operator also has a problem for a real time processing since it performs on all pixels of the scene. In this paper a possible method using gray level vision system and available pre-known information of license plates is suggested. The suggested procedure searches the lower boundary of the plate by counting high contrast points between one and near pixel from the bottom line of the scene. It finds the upper boundary from the bottom line by adding number plate height after finding the lower boundary. The left and right boundaries are found by similar processes.

• Proceedings of the KIEE Conference
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• 2007.10c
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• pp.154-156
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• 2007

This paper proposes new control method of maximum power point tracking for the seaflow generation system. This control system is performed by using the duty ratio control of DC/DC converter. An advantage of MPPT(Maximum Power Point Tracking)control method presented in this paper is not necessary to use the seaflow turbine characteristic at various seaflow speed and measure the tidal speed and/or the rotation speed of the seaflow generator. Therefore the resulting system ha s the characteristics of lower cost, higher efficiency and lower complexity. The fuzzy controller is used to control the duty ratio of DC/DC converter. So the reactivity and the reliablilty of the generation system is developed. Proposed control method was analyzed mathematically and tested by computer simulation by using Matlab $Simulink^{(R)}$.

• Proceedings of the Computational Structural Engineering Institute Conference
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• 1996.10a
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• pp.239-246
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• 1996

Very stiff floor system in a residential-commercial building causes some problems in the numerical analysis procedure due to significant difference in stiffness with adjacent structural elements. Static analysis of structure with a stiff transfer-floor can be peformed approximately in two steps for upper and lower pons for the structure. However, it is impossible to perform dynamic analysis in two steps with separate models. An efficient method for dynamic analysis of a structure with a rigid floor system is proposed in this study. The matrix condensation technique is employed to reduce the degree of freedom for upper and lower parts of the structure and a beam elements with rigid bodies of both ends are introduce to model the rigid floor system. Efficiency end accuracy of the proposed method ore verified through analysis of several example structures.

• 제어로봇시스템학회:학술대회논문집
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• 2002.10a
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• pp.66.5-66
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• 2002

Flatness of strip at aluminum cold rolling is one of the important quality parameters of rolled products. The reasons for this are perhaps obvious: for many of the end uses, subsequent processing requires a flat product poor flatness on-line can lead to reduced running speeds and hence to lower production levels. Amongst the reasons for lower running speeds is the increased risk of strip breaks. The Alcan Ulsan plant developed an automatic flatness control system on conventional four high mills for a year. This system compose of three parts as Intel RMX 3.3 operating system, advanced techniques, and flatness error analysis system. Strip flatness be measured by air bearing roll, passing the s...

• Journal of Korean Society of Water and Wastewater
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• v.27 no.3
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• pp.373-382
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• 2013

In this study, a biological odor treatment system was proposed to remove odor(foul smell) materials causing several problems in the closed sewage treatment plant. This odor treatment system was composed of a two-step biofilter system in one reactor. The two-step biofilter reactor was constructed with natural purification layer in upper part and artificial purification layer in lower part. The reed grasses of water purification plants were planted in the surface area and mixed porous ceramic media were filled with the lower part of biofilter reactor. By using the above experimental apparatus, the ammonia gas removal efficiency was attained to 98.3 % and the hydrogen sulfide gas removal efficiency was appeared more than 97.7 % which shows more effective than the conventional odor removal process.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.347-350
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• 2000

We present the design of ternary flip-flop which is based on ternary logic so as to process ternary data. These flip-flops are fabricated with ternary voltage mode NOR, NAND, INVERTER gates. These logic gate circuits are designed using CMOS and obtained the characteristics of a lower voltage, a lower power consumption as compared to other gates. These circuits have been simulated with the electrical parameters of a standard 0.25 micron CMOS technology and 2.5 volts supply voltage. The Architecture of proposed ternary flip-flop is highly modular and well suited for VLSI implementation, only using ternary gates.

• The Transactions of the Korea Information Processing Society
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• v.6 no.5
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• pp.1351-1361
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• 1999

The wide spread of multimedia system demands a large area viewing display device which can inform a message to many people in open area. This paper is about the design of a large area viewing LED panel control system. The control system runs on 16 bit microprocessor MC68EC000 and has following functions: 16 line clock and time, 2 channel priority interrupt, 2 channel direct memory access, 2 channel 12 bit clock and timer, 2 channel infrared remocon receiver, 2 channel RS-232C with 16 byte FIFO, IBM PC/AT compatible keyboard interface, ISA bus, battery backuped real time clock, battery backuped 256 byte SRAM and watch dog timer. The core circuits are implemented to ASIC, considering lower cost, higher reliability, higher performance, smaller dimension, and lower power consumption. This is verified by simulation and fabricated in 0.6 um CMOS SOG processes. The total gate count is 39,083 and the clock frequency is 48 MGz. The fabricated ASIC is mounted on test board.

• Proceedings of the Earthquake Engineering Society of Korea Conference
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• 2006.03a
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• pp.409-416
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• 2006

The seismic characteristics with 3-Dimensional Floor Isolation System have been studied using a shaking table system. In this study, we made two kind of floor system (Type I, Type II) and several seismic tests with and without isolation system were conducted to evaluate 3-Dimensional Floor Isolation Effectiveness. Both type have showed large reduction effectiveness in acceleration, response spectra but Type II have showed lower acceleration and lower first mode in response spectra, compared to type I. On the basis of test results and consideration of application, it is found that type II is more suitable for floor model of main control room of Nuclear Power Plant.

• International Journal of Computer Science & Network Security
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• v.22 no.2
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• pp.241-249
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• 2022

The current research attempts to measure the level of the acceptance of the Blackboard System (BBS) during the Corona crisis, and whether this is one of the reasons for the low use of the BBS at Al-Jouf University. To achieve this, the technology accepting model in the time of crisis (TAMTC) has been proposed to measure the degree of acceptance by students, which was then applied to a random sample of 339 of such. The results show a high level of student acceptance, despite their lower use of the system. The research also highlights the importance of upgrading e-courses and that the discontinuation of exam disqualification of students is secondary to their poor course attendance.

• Journal of KIISE:Computer Systems and Theory
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• v.36 no.1
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• pp.26-32
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• 2009

The multi-level storage architecture has been widely adopted in servers and data centers. However, while prefetching has been shown as a crucial technique to exploit sequentiality in accesses common for such systems and hide the increasing relative cost of disk I/O, existing multi-level storage studies have focused mostly on cache replacement strategies. In this paper, we show that prefetching algorithms designed for single-level systems may have their limitations magnified when applied to multi-level systems. Overly conservative prefetching will not be able to effectively use the lower-level cache space, while overly aggressive prefetching will be compounded across levels and generate large amounts of wasted prefetch. We design and implement a hierarchy-aware lower-level prefetching strategy called PMS(Prefetching strategy for Multi-level Storage system) that applicable to any upper level prefetching algorithms. PMS does not require any application hints, a priori knowledge from the application or modification to the va interface. Instead, it monitors the upper-level access patterns as well as the lower-level cache status, and dynamically adjusts the aggressiveness of the lower-level prefetching activities. We evaluated the PMS through extensive simulation studies using a verified multi-level storage simulator, an accurate disk simulator, and access traces with different access patterns. Our results indicate that PMS dynamically controls aggressiveness of lower-level prefetching in reaction to multiple system and workload parameters, improving the overall system performance in all 32 test cases. Working with four well-known existing prefetching algorithms adopted in real systems, PMS obtains an improvement of up to 35% for the average request response time, with an average improvement of 16.56% over all cases.