• Journal of Power Electronics
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• 제7권4호
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• pp.328-335
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• 2007

A conventional Single-Stage Power-Factor-Correction (PFC) AC/DC converter has a link capacitor voltage problem under high line input and low load conditions. In this paper, this problem is analyzed by using the voltage conversion ratio of the DC/DC conversion cell. By applying this analysis, a new Single-Stage PFC AC/DC converter with a boost PFC cell integrated with a Voltage-Doubler Rectified Asymmetrical Half-Bridge (VDRAHB) is proposed. The proposed converter features good power factor correction, low current harmonic distortions, tight output regulations and low voltage of the link capacitor. An 85W prototype was implemented to show that it meets harmonic requirements and standards satisfactorily with near unity power factor and high efficiency over universal input.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2008년도 하계학술대회 논문집
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• pp.505-507
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• 2008

A conventional active-clamp forward (ACF) converter is a favorable candidate in low-to-medium power applications. However, the switches suffer from high voltage stress, i.e., sum of the input voltage and the reset capacitor voltage. Therefore, it is not suitable for high input voltage applications such as a front-end converter of which the input voltage is about 400-$V_{dc}$. To solve this problem, three-switch ACF (TS-ACF) converter, which employs two main switches and one auxiliary switch with low voltage stress, is proposed. Utilizing low-voltage rated switches, the proposed converter is promising for high input voltage applications with high efficiency and low cost.

• Journal of Electrical Engineering and Technology
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• 제2권3호
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• pp.294-299
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• 2007

This paper presents a special protection scheme, which was established in the KEPCO (Korea Electric Power Corporation) system, against a critically low voltage profile in a part of the system after a double-circuit tower outage. Without establishing the scheme, the outage triggers the operation of a zone 3 relay and trips the component. This sequence of events possibly leads to a blackout of the local system. The scheme consists of an inter-substation communication network using PITR (Protective Integrated Transmitter and Receiver) for acquisition of the substations' data, and under-voltage load shedding devices. This paper describes the procedure for determining the load shedding in the scheme and the experiences of the implementation.

• ETRI Journal
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• 제37권5호
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• pp.961-971
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• 2015

This paper proposes a 250 mV supply voltage digital low-dropout (LDO) regulator. The proposed LDO regulator reduces the supply voltage to 250 mV by implementing with all digital circuits in a$0.11{\mu}m$ CMOS process. The fast current tracking scheme achieves the fast settling time of the output voltage by eliminating the ringing problem. The over-voltage and under-voltage detection circuits decrease the overshoot and undershoot voltages by changing the switch array current rapidly. The switch bias circuit reduces the size of the current switch array to 1/3, which applies a forward body bias voltage at low supply voltage. The fabricated LDO regulator worked at 0.25 V to 1.2 V supply voltage. It achieved 250 mV supply voltage and 220 mV output voltage with 99.5% current efficiency and 8 mV ripple voltage at $20{\mu}A$ to $200{\mu}A$ load current.

• Journal of Electrical Engineering and Technology
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• 제12권2호
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• pp.549-558
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• 2017

DC distribution has several differences compared to AC distribution. DC distribution has a higher efficiency than AC distribution when distributing electricity at the same voltage level. Accordingly, power can be transferred further with low-voltage DC. In addition, power flow in a DC grid system is produced by only a voltage difference in magnitude. Owing to these differences, operation of a DC grid system significantly differs from that of an AC system. In this paper, the power flow problem in a bipolar-type DC grid with unbalanced load conditions is organized and solved. Control strategy of energy storage system on a slow time scale with power references obtained by solving an optimization problem regarding the DC grid is then proposed. The proposed strategy is verified with computer simulations.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(1)
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• pp.341-345
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• 2004

A high efficiency and low device stress voltage and current clamping BVS PWM asymmetrical half bridge converter is proposed in this paper. To achieve the ZVS of power switches along the wide load range, the transformer leakage inductor $L_{Ikg}$ is increased. Then, to solve the problem related to ringing in the secondary rectifier caused by the resonance between $L_{Ikg}$ and rectifier junction capacitors, the proposed converter employs a voltage and current clamping cell, which helps voltages and currents of rectifier diodes to be clamped at the output voltage and output current, respectively. Therefore, no RC-snubber for rectifier diodes is needed and a high efficiency as well as low noise output voltage can be realized. In addition, since all energy stored in $L_{Ikg}$ is transferred to the output side, the circulating energy problem can be effectively solved and duty loss does net exist. The operational principle, theoretical analysis, and design considerations are presented. To confirm the operation, validity, and features of the proposed circuit, experimental results from a 425W, 385-170Vdc prototype are presented.

• 전기학회논문지P
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• 제65권3호
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• pp.178-182
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• 2016

FIDVR(Fault Induced Delayed Voltage Recovery) is a phenomenon that recovery of the system voltage level delays after the fault. Cause of FIDVR phenomenon is motor load characteristic about voltage and reactive power. In low voltage condition, the motor go to stall state that consume large amount of reactive power. As a result, the voltage recovery problem is that of repeated occurrences of sustained low voltage following faults on the system. In this paper, analysis the characteristics of the motor load. And using the korean power system actual data, perform a case studies to voltage delay recovery phenomenon alleviation method. Change of each parameters by analyzing the effect on system and selecting an influence parameter. In addition, dynamic characteristic analysis of the resulting difference in the proportion by the motor load in power systems, considering the effect on the voltage stability.

• 전력전자학회논문지
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• 제17권5호
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• pp.377-387
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• 2012

A single-phase grid-connected PV system is known as suitable for housing of less than 3 kW. The DC link voltage in a single-phase PV system has necessarily twice component of fundamental wave. It makes high THD in the grid current. According to the problem, power quality is lower. Many engineers have studied about this problem. The most simple method is to use low pass filter on DC link voltage control. However it is affected by DC link voltage control bandwidth. If cutoff frequency is reduced to increase the performance of low pass filter, it also lowers DC link voltage control bandwidth. Second method is using band stop filter, it works good on steady state but not good on transient state. This paper proposes the new method for removing ripple voltage to get an exact current reference. It improves the responses on steady state and transient state. The performance was verified through computer simulation using MATLAB and actual experiments.

• 한국산업융합학회 논문집
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• 제24권4_1호
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• pp.387-395
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• 2021

Distributed resources such as renewable energy sources and ESS are connected to the low voltage direct current(LVDC) distribution network through the power conversion system(PCS). Control power is required for the operation of the PCS. In general, controller power is supplied from AC power or DC power through switch mode power supply(SMPS). However, the conventional SMPS has a low input voltage, so development and research on high input voltage self-power suitable for LVDC is insufficient. In this paper, to develop Self-Power that can be used for LVDC, the characteristics of the conventional topology are analyzed, and a series-input single-output flyback converter using a flux-sharing transformer for high voltage is designed. The high input voltage Self-Power was designed in the DCM(discontinuous current mode) to reduce the switching loss and solve the problem of current dissipation. In addition, since it operates even at low input voltage, it can be applied to many applications as well as LVDC. The validity of the proposed high input voltage self-power is verified through experiments.

• 반도체디스플레이기술학회지
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• 제13권4호
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• pp.65-70
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• 2014

This paper is to improve the problem of the LED dimming control system using the conventional PWM and DAC method. The conventional PWM method controls the average current to switch dimming signal. This method generates the flicker when controlling at a low current. In order to solve the problem, this system prevents the flicker with the DAC method. The LED is lit at micro-current flowing in the LED. And offset voltage is generated in the output of the DAC when the DAC output is very low voltage as 0V. This was resolved by the voltage drop of the output voltage to construct a negative offset circuit. In addition, the LED current can't flow as set values because of overheating of FET. In order to solve the problem, the 16 bits ADC in the microprocessor is a more accurate current control receives the LED current in comparison with the set value. Therefore, the LED dimming control system proposed in this paper showed the accurate and reliable more than conventional systems.