• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.71-71
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• 2012

As the critical dimensions of integrated circuits are scaled down, the line width and spacing between the metal interconnects are made smaller. The dielectric film used as insulation between the metal lines contributes to the resistance-capacitance (RC) time constant that governs the device speed. If the RC time delay, cross talk and lowering the power dissipation are to be reduced, the intermetal dielectric (IMD) films should have a low dielectric constant. The introduction of Cu and low-k dielectrics has incrementally improved the situation as compared to the conventional $Al/SiO_2$ technology by reducing both the resistivity and the capacitance between interconnects. Some of the potential candidate materials to be used as an ILD are organic and inorganic precursors such as hydrogensilsequioxane (HSQ), silsesquioxane (SSQ), methylsilsisequioxane (MSQ) and carbon doped silicon oxide (SiOCH), It has been shown that organic functional groups can dramatically decrease dielectric constant by increasing the free volume of films. Recently, various inorganic precursors have been used to prepare the SiOCH films. The k value of the material depends on the number of $CH_3$ groups built into the structure since they lower both polarity and density of the material by steric hindrance, which the replacement of Si-O bonds with Si-$CH_3$ (methyl group) bonds causes bulk porosity due to the formation of nano-sized voids within the silicon oxide matrix. In this talk, we will be introduce some properties of SiOC(-H) thin films deposited with the dimethyldimethoxysilane (DMDMS: $C_4H_{12}O_2Si$) and oxygen as precursors by using plasma-enhanced chemical vapor deposition with and without ultraviolet (UV) irradiation.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.10-10
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• 2008

Silicide is inevitable for CMOSFETs to reduce RC delay by reducing the sheet resistance of gate and source/drain regions. Ni-silicide is a promising material which can be used for the 65nm CMOS technologies. Ni-silicide was proposed in order to make up for the weak points of Co-silicide and Ti-silicide, such as the high consumption of silicon and the line width limitation. Low resistivity NiSi can be formed at low temperature ($\sim500^{\circ}C$) with only one-step heat treat. Ni silicide also has less dependence of sheet resistance on line width and less consumption of silicon because of low resistivity NiSi phase. However, the low thermal stability of the Ni-silicide is a major problem for the post process implementation, such as metalization or ILD(inter layer dielectric) process, that is, it is crucial to prevent both the agglomeration of mono-silicide and its transformation into $NiSi_2$. To solve the thermal immune problem of Ni-silicide, various studies, such as capping layer and inter layer, have been worked. In this paper, the Ni-silicide utilizing Pd stacked layer (Pd/Ni/TiN) was studied for highly thermal immune nano-scale CMOSFETs technology. The proposed structure was compared with NiITiN structure and showed much better thermal stability than Ni/TiN.

• 대한전자공학회논문지SD
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• 제39권4호
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• pp.19-25
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• 2002

본 논문에서는 실리콘 기판상의 전송선로 특성을 개선하기 위하여 표면 마이크로머시닝 기술을 이용하여 10㎛ 두께의 다공질 실리콘 산화막으로 제조된 기판 위에 air-bridge interconnect된 CPW 전송선로를 제작하였다. 간격이 30㎛ 신호선이 80㎛인 CPW air-bridge 전송선의 삽입손실은 4㎓에서 -0.25 ㏈이며, 반사손실은 -28.9 ㏈를 나타내었다. S-W-S = 30-100-30 ㎛인 stepped compensated air-bridge를 가진 CPW는 손실이 4㎓일 때, -0.98 ㏈ 개선됨을 알 수 있었다. 이와 같은 결과로부터 두꺼운 다공질 실리콘은 고 저항 실리콘 집적회로 공정에서 고성능, 저가의 마이크로파 및 밀리미터파 회로 응용에 충분히 활용 될 수 있으리라 기대된다.

• 전자공학회논문지D
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• 제35D권10호
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• pp.83-90
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• 1998

MOS 캐패시터의 게이트 전극을 비정질 상태의 실리콘으로 형성하여 GOI(Gate Oxide Integrity)특성에 미치는 불순물 활성화 열처리의 효과를 조사하였다. LPCVD(Low Pressure Chemical Vapor Deposition) 방법으로 증착한 비정질 실리콘 게이트 전극은 활성화 열처리에 의하여 다결정 실리콘 상태로 구조가 변화하며, 불순물 원자의 활성화가 충분히 이루어졌다. 또한, 비정질 상태의 게이트 전극은 커다란 압축 응력(compressive stress)을 가지지만, 활성화 열처리 온도가 700℃에서 900℃로 증가함에 따라서 응력이 완화되었고 게이트 전극의 저항도 감소하는 특성을 보였다. 또한 얇은 게이트 산화막의 신뢰성 및 산화막의 계면특성은 활성화 열처리 온도에 크게 의존하고 있었다. 900℃에서 활성화 열처리를 한 경우가 700℃에서 열처리한 경우보다 산화막내에서의 전하 포획 특성이 개선되었으며, 산화막의 신뢰성이 향상되었다. 특히, TDDB 방법으로 예측한 게이트 산화막의 수명은 700℃의 열처리에서는 3×10/sup 10/초였지만, 900℃에서의 열처리에서는 2×10/sup 12/초로 현저하게 개선되었다. 그리고, 산화막 계면에서의 계면 전하 밀도는 게이트의 응력 완화에 따라서 개선되었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 춘계학술대회 논문집 방전 플라즈마 유기절연재료 초전도 자성체연구회
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• pp.76-81
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• 2004

This paper presents the results of spectral analysis of leakage current waveforms on contaminated insulators under various fog and environment conditions(salt fog, clean fog, rain) The larger the leakage current during 200ms, the higer the power spectrum at 60Hz. For almost equal maximum current during 200ms, however, the spectrum at 60hz and the odd order harmonics increase emphatically when discharges occur continuously for several half-waves. If contaminated insulators suffers from high salt-density fog, the leakage current occurs with high crest value intermittently, results in the low spectrum. Analysis of leakage current data showed that this electrical activity was characterized by transient arcing behavior contaminants are deposited on the insulator surface during salt fog tests. This provides a path for the leakage current to flow along the surface of the insulator. It is important to have an indication of the pollution accumulation in order to evulate the test performance of a particular insulator. If the drop in surface resistivity is severe enough, then the leakage current may escalate into s service interrupting flashover that degrade power quality.

• 한국결정성장학회지
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• 제34권2호
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• pp.41-47
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• 2024

본 연구에서는 SiC(Silicon Carbide) 분말의 순도와 결정 성장 후 냉각 속도를 제어하여 PVT(Physical Vapor Transport) 방법으로 성장한 4인치 HPSI(High-Purity Semi-Insulating)-SiC 단결정의 저항 특성을 조사하였다. 순도가 다른 2개의 β-SiC 분말을 사용하였고, 성장 후 냉각 속도를 조절하여 다양한 저항값을 얻었다. 성장된 결정의 투과/흡수 스펙트럼 및 결정 품질은 각각 UV/VIs/NIR 분석과 XRD Rocking curve 분석을 이용하였으며, 비접촉 비저항 분석을 통해 전기적 특성을 조사하여 비저항 특성에 우세한 영향을 미치는 주요 요인을 확인하였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.295-295
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• 2016

Recently, TCO films with low carrier concentration, high mobility and high work function are proposed beneficial as front electrode in HIT solar cell due to free-carrier absorption in NIR wavelength region and low Schottky barrier height in the front TCO/a-Si:H(p) interface. We report high transmittance and work function zirconium-doped indium tin oxide (ITO:Zr) films with various plasma (Ar/O2 and Ar) conditions. The role of (Ar/O2) plasma was to enhance the work function of the ITO:Zr films whereas the pure Ar plasma based ITO:Zr showed good electrical properties. The RF magnetron sputtered ITO:Zr films with low resistivity and high transmittance were employed as front electrode in HIT solar cells, yield the best performance of 18.15% with an open-circuit voltage of 710 eV and current density of 34.63 mA/cm2. The high work function ITO:Zr films can be used to modify the front barrier height of HIT solar cell.

• 한국전기전자재료학회논문지
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• 제15권1호
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• pp.61-66
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• 2002

A method for designing antireflection (AR) and antistatic (AS) coating layer by the use of conducting polymer as an electrically conductive transparent layer is proposed. The conducting AR coating is composed of four-layer with alternating high and low refractive index layer: silicon dioxide (n=1.44) and titanium dioxide (n=2.02) prepared at low temperature by sol-gel method are used as the low and high refractive index layer, respectively. The poly(3,4-ethylenedioxythiophene) which has the surface resistivity of 10$^4$Ω/$\square$ is used as a conductive layer. Optical constant of each ARAS coating layers such as refractive index and optical thickness were measured by 7he spectroscopic ellipsometer and from the measured optical constants the spectral properties such as reflectance and transmittance were simulated in the risible region. The reflectance of ARAS films on glass substrate was below 1 %R and the transmittance was higher than 95 % in the visible wavelength (400-700 nm). The measured AR spectral properties was very similar to its simulated results.

• 한국전기전자재료학회논문지
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• 제24권12호
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• pp.1010-1017
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• 2011

The use of plated front contact for metallization of silicon solar cell may alternative technologies as a screen printed and silver paste contact. This technologies should allow the formation of contact with low contact resistivity a high line conductivity and also reduction of shading losses. A selective emitter structure with highly dopes regions underneath the metal contacts, is widely known to be one of the most promising high-efficiency solution in solar cell processing. When fabricated Ni/Cu plating metallization cell with a selective emitter structure, it has been shown that efficiencies of up to 18% have been achieved using this technology.

• 전기의세계
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• 제21권2호
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• pp.25-33
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• 1972

The main focus of this paper is on the study of voltage-current characteristics in disk-type siliconcarbide resistors. For each of the 15 different sintering and other process conditions, 10 samples were prepared. Experiments performed with each sample consist of supplying sinusoidal AC current of a few miliamperes after conditioning-shots with 400ma. Experimental data were examined with regard to the relationship between the process conditions and the nonlinear resistivity. The examination suggests several possibilities of improving the nonlinlinear characteristics of siliconcarbide resistors while maintaining low resitance. One of those possible conditions is to sinter the powdered SiC and the binding materials approximately 2 hours in nitrogen. In addition to describing the nonlinear characteristics of siliconcarbide resistors, this paper also presents the distortion characteristics of current waves vs. the nonlinear exponent, n. Photographical results show that the more nonlinear characteristics samples have, the more distorted current waves are.