• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.71-71
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• 2012

As the critical dimensions of integrated circuits are scaled down, the line width and spacing between the metal interconnects are made smaller. The dielectric film used as insulation between the metal lines contributes to the resistance-capacitance (RC) time constant that governs the device speed. If the RC time delay, cross talk and lowering the power dissipation are to be reduced, the intermetal dielectric (IMD) films should have a low dielectric constant. The introduction of Cu and low-k dielectrics has incrementally improved the situation as compared to the conventional $Al/SiO_2$ technology by reducing both the resistivity and the capacitance between interconnects. Some of the potential candidate materials to be used as an ILD are organic and inorganic precursors such as hydrogensilsequioxane (HSQ), silsesquioxane (SSQ), methylsilsisequioxane (MSQ) and carbon doped silicon oxide (SiOCH), It has been shown that organic functional groups can dramatically decrease dielectric constant by increasing the free volume of films. Recently, various inorganic precursors have been used to prepare the SiOCH films. The k value of the material depends on the number of $CH_3$ groups built into the structure since they lower both polarity and density of the material by steric hindrance, which the replacement of Si-O bonds with Si-$CH_3$ (methyl group) bonds causes bulk porosity due to the formation of nano-sized voids within the silicon oxide matrix. In this talk, we will be introduce some properties of SiOC(-H) thin films deposited with the dimethyldimethoxysilane (DMDMS: $C_4H_{12}O_2Si$) and oxygen as precursors by using plasma-enhanced chemical vapor deposition with and without ultraviolet (UV) irradiation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.10-10
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• 2008

Silicide is inevitable for CMOSFETs to reduce RC delay by reducing the sheet resistance of gate and source/drain regions. Ni-silicide is a promising material which can be used for the 65nm CMOS technologies. Ni-silicide was proposed in order to make up for the weak points of Co-silicide and Ti-silicide, such as the high consumption of silicon and the line width limitation. Low resistivity NiSi can be formed at low temperature ($\sim500^{\circ}C$) with only one-step heat treat. Ni silicide also has less dependence of sheet resistance on line width and less consumption of silicon because of low resistivity NiSi phase. However, the low thermal stability of the Ni-silicide is a major problem for the post process implementation, such as metalization or ILD(inter layer dielectric) process, that is, it is crucial to prevent both the agglomeration of mono-silicide and its transformation into $NiSi_2$. To solve the thermal immune problem of Ni-silicide, various studies, such as capping layer and inter layer, have been worked. In this paper, the Ni-silicide utilizing Pd stacked layer (Pd/Ni/TiN) was studied for highly thermal immune nano-scale CMOSFETs technology. The proposed structure was compared with NiITiN structure and showed much better thermal stability than Ni/TiN.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.4
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• pp.19-25
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• 2002

In this paper, to improve the characteristics of a transmission line on silicon substrate, we fabricated air-bridge interconnected CPW transmission line on a 10-${\mu}{\textrm}{m}$-thick oxidized porous silicon(OPS) substrate using surface micromachining. Air-bridge interconnected CPW of S-W-S = 30-80-30 ${\mu}{\textrm}{m}$has insertion loss of -0.25 ㏈ and return loss of -28.9 ㏈ at 4㎓ And return loss of CPW with stepped compensated air-bridge(S-W-S : 30-100-30 ${\mu}{\textrm}{m}$) is improved -0.98㏈ at 4㎓. The results indicate that the thick OPS provides an approach to incorporate high performance, low cost microwave and millimeter wave circuits in a high-resistivity silicon-based process.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.10
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• pp.83-90
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• 1998

The effects of dopant activation anneal on GOI (Gate Oxide Integrity) of MOS capacitor with amorphous silicon gate electrode were investigated. It was found that the amorphous silicon gate electrode was crystallized and the dopant atoms were sufficiently activated by activation anneal. The mechanical stress of gate electrode that reveals large compressive stress in amorphous state, was released with increase of anneal temperature from $700^{\circ}C$ to 90$0^{\circ}C$. The resistivity of gate electrode polycrystalline silicon film is decreased by the increase of anneal temperature. The reliability of thin gate oxide and interface properties between oxide and silicon substrate greatly depends on the activation anneal temperature. The charge trapping characteristics as well as oxide reliability are improved by the anneal of 90$0^{\circ}C$ compare to that of $700^{\circ}C$ or 80$0^{\circ}C$. Especially, the lifetimes of the thin gate oxide estimated by TDDB method is 3$\times$10$^{10}$ for the case of $700^{\circ}C$ anneal, is significantly increased to 2$\times$10$^{12}$ for the case of 90$0^{\circ}C$ anneal. Finally, the interface trap density is reduced with relaxation of mechanical stress of gate electrode.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.05b
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• pp.76-81
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• 2004

This paper presents the results of spectral analysis of leakage current waveforms on contaminated insulators under various fog and environment conditions(salt fog, clean fog, rain) The larger the leakage current during 200ms, the higer the power spectrum at 60Hz. For almost equal maximum current during 200ms, however, the spectrum at 60hz and the odd order harmonics increase emphatically when discharges occur continuously for several half-waves. If contaminated insulators suffers from high salt-density fog, the leakage current occurs with high crest value intermittently, results in the low spectrum. Analysis of leakage current data showed that this electrical activity was characterized by transient arcing behavior contaminants are deposited on the insulator surface during salt fog tests. This provides a path for the leakage current to flow along the surface of the insulator. It is important to have an indication of the pollution accumulation in order to evulate the test performance of a particular insulator. If the drop in surface resistivity is severe enough, then the leakage current may escalate into s service interrupting flashover that degrade power quality.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.34 no.2
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• pp.41-47
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• 2024

In this study, the resistance characteristics of semi-insulating SiC single crystals grown using the PVT method were investigated, considering the purity level of SiC source powders used in PVT growth and the cooling procedure after crystal growth. Two β-SiC powders with different purities were employed, and the cooling rate after growth was adjusted to achieve various resistance values. 4-inch HPSI-SiC ingots were grown using the PVT method, utilizing SiC powders with low nitrogen concentration and relatively high nitrogen concentration. These ingots were then subjected to different cooling procedures to modify the cooling rate. Transmission/absorption spectra and crystal quality of the grown crystals were analyzed through UV/VIs/NIR spectroscopy and X-ray rocking curve analysis, respectively. Additionally, electrical properties were investigated through non-contact resistivity analysis to identify the dominant factors influencing resistivity properties.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.295-295
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• 2016

Recently, TCO films with low carrier concentration, high mobility and high work function are proposed beneficial as front electrode in HIT solar cell due to free-carrier absorption in NIR wavelength region and low Schottky barrier height in the front TCO/a-Si:H(p) interface. We report high transmittance and work function zirconium-doped indium tin oxide (ITO:Zr) films with various plasma (Ar/O2 and Ar) conditions. The role of (Ar/O2) plasma was to enhance the work function of the ITO:Zr films whereas the pure Ar plasma based ITO:Zr showed good electrical properties. The RF magnetron sputtered ITO:Zr films with low resistivity and high transmittance were employed as front electrode in HIT solar cells, yield the best performance of 18.15% with an open-circuit voltage of 710 eV and current density of 34.63 mA/cm2. The high work function ITO:Zr films can be used to modify the front barrier height of HIT solar cell.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.1
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• pp.61-66
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• 2002

A method for designing antireflection (AR) and antistatic (AS) coating layer by the use of conducting polymer as an electrically conductive transparent layer is proposed. The conducting AR coating is composed of four-layer with alternating high and low refractive index layer: silicon dioxide (n=1.44) and titanium dioxide (n=2.02) prepared at low temperature by sol-gel method are used as the low and high refractive index layer, respectively. The poly(3,4-ethylenedioxythiophene) which has the surface resistivity of 10$^4$Ω/$\square$ is used as a conductive layer. Optical constant of each ARAS coating layers such as refractive index and optical thickness were measured by 7he spectroscopic ellipsometer and from the measured optical constants the spectral properties such as reflectance and transmittance were simulated in the risible region. The reflectance of ARAS films on glass substrate was below 1 %R and the transmittance was higher than 95 % in the visible wavelength (400-700 nm). The measured AR spectral properties was very similar to its simulated results.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.12
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• pp.1010-1017
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• 2011

The use of plated front contact for metallization of silicon solar cell may alternative technologies as a screen printed and silver paste contact. This technologies should allow the formation of contact with low contact resistivity a high line conductivity and also reduction of shading losses. A selective emitter structure with highly dopes regions underneath the metal contacts, is widely known to be one of the most promising high-efficiency solution in solar cell processing. When fabricated Ni/Cu plating metallization cell with a selective emitter structure, it has been shown that efficiencies of up to 18% have been achieved using this technology.

• 전기의세계
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• v.21 no.2
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• pp.25-33
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• 1972

The main focus of this paper is on the study of voltage-current characteristics in disk-type siliconcarbide resistors. For each of the 15 different sintering and other process conditions, 10 samples were prepared. Experiments performed with each sample consist of supplying sinusoidal AC current of a few miliamperes after conditioning-shots with 400ma. Experimental data were examined with regard to the relationship between the process conditions and the nonlinear resistivity. The examination suggests several possibilities of improving the nonlinlinear characteristics of siliconcarbide resistors while maintaining low resitance. One of those possible conditions is to sinter the powdered SiC and the binding materials approximately 2 hours in nitrogen. In addition to describing the nonlinear characteristics of siliconcarbide resistors, this paper also presents the distortion characteristics of current waves vs. the nonlinear exponent, n. Photographical results show that the more nonlinear characteristics samples have, the more distorted current waves are.