• International journal of advanced smart convergence
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• v.8 no.4
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• pp.188-193
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• 2019

This paper is about environment-based low-code and no-code execution platform and execution method that combines hybrid and native apps. In detail, this paper describes the Low-Code/No-Code execution structure that combines the advantages of hybrid and native apps. It supports the iPhone and Android phones simultaneously, supports various templates, and avoids developer-oriented development methods based on the production process of coding-free apps and the produced apps play the role of Java virtual machine (VM). The Low-Code /No-Code (LCNC) development platform is a visual integrated development environment that allows non-technical developers to drag and drop application components to develop mobile or web applications. It provides the functions to manage dependencies that are packaged into small modules such as widgets and dynamically loads when needed, to apply model-view-controller (MVC) pattern, and to handle document object model (DOM). In the Low-Code/No-Code system, the widget calls the AppOS API provided by the UCMS platform to deliver the necessary requests to AppOS. The AppOS API provides authentication/authorization, online to offline (O2O), commerce, messaging, social publishing, and vision. It includes providing the functionality of vision.

• International Journal of Internet, Broadcasting and Communication
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• v.16 no.3
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• pp.370-378
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• 2024

Recently, Artificial Intelligence (AI) has been emerging as a technology that has transformed and revolutionized various industries around the world. In recent years, businesses in Vietnam have also started to embrace AI applications to enhance their operations and gain a competitive edge in the market. As AI technologies continue to evolve rapidly, their impact on Vietnamese businesses is becoming increasingly profound. As artificial intelligence continues to progress across various fields, the need to democratize AI technology becomes increasingly clear. In a rapidly growing market like Vietnam, leveraging AI offers significant opportunities for businesses to improve operational efficiency, customer engagement, and overall competitiveness. However, significant barriers to AI adoption in Vietnam are the scarcity of skilled developers and the high cost of implementing traditional AI. No-code/low-code platforms offer an innovative solution that can accelerate AI adoption by making these technologies accessible to a wider audience. This article analyzes and understands the benefits of no-code/low-code solutions and proposes a roadmap for implementing no-code/low-code solutions in promoting AI applications in Vietnamese businesses.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.7C
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• pp.587-593
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• 2010

In this paper we design an irregular low-density parity-check (LDPC) code for multiple-input multiple-output (MIMO) system, using a simple extrinsic information transfer (EXIT) chart method. The MIMO systems considered are optimal maximum a posteriori probability (MAP) detector. The MIMO detector and the LDPC decoder exchange soft information and form a turbo iterative receiver. The EXIT charts are used to obtain the edge degree distribution of the irregular LDPC code which is optimized for the MIMO detector. It is shown that the performance of the designed LDPC code is better than that of conventional LDPC code which was optimized for either the Additive White Gaussian Noise (AWGN) channel or the MIMO channel.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.3C
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• pp.205-215
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• 2007

This paper presents low latency and/or computation algorithms of iterative codes of turbo codes, turbo product codes and low density parity check codes for use in wireless broadband communication systems. Due to high coding complexity of iterative codes, this paper focus on lower complexity and/or latency algorithms that are easily implementable in hardware and further accelerate the decoding speed.

• Journal of the Korean Institute of Intelligent Systems
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• v.19 no.2
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• pp.180-184
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• 2009

The memory is very sensitive to the soft error because the integration of the memory increases under low power environment. Error correcting codes (ECCs) are commonly used to protect against the soft errors. This paper proposes a new genetic ECC design method which reduces power consumption. Power is minimized using the degrees of freedom in selecting the parity check matrix of the ECCs. Therefore, the genetic algorithm which has the novel genetic operators tailored for this formulation is employed to solve the non-linear power optimization problem. Experiments are performed with Hamming code and Hsiao code to illustrate the performance of the proposed method.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.4
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• pp.430-435
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• 2018

In this paper, an improved decoding scheme for low-complexity parity-check(LCPC) code with small code length is proposed. The LCPC code is less complex than the turbo code or low density parity check(LDPC) code and requires less memory, making it suitable for communication between internet-of-things(IoT) devices. The IoT devices are required to have low complexity due to limited energy and have a low end-to-end delay time. In addition, since the packet length to be transmitted is small and the signal processing capability of the IoT terminal is small, the LCPC coding system should be as simple as possible. The LCPC code can correct all single errors and correct some of the two errors. In this paper, the proposed decoding scheme improves the bit error rate(BER) performance without increasing the complexity by correcting both errors using the soft value of the modulator output stage. As a result of the simulation using the proposed decoding scheme, the code gain of about 1.1 [dB] was obtained at the bit error rate of $10^{-5}$ compared with the existing decoding method.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.05a
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• pp.689-692
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• 2008

Hierarchical modulation has been considered for achieving higher data rates in Terrestrial-DMB(T-DMB) systems. And for achieving a higher data rates transmission, the low-priority (LP) data, which is used to carry additional data, such as video data, audio data and textual data, should be perfectly decoded in a certain value of $E_b/N_o$. Unfortunately, the man-made noise badly affects the high-priority (HP) symbol, which is used to carry the conventional data in the existed T-DMB system; and since the advanced T-DMB system is proposed to fit for the legacy T-DMB receivers, the low-priority symbols in the hierarchical modulation are much worse affected by the neighbors, who are both in the same quadrant. Because of the feature that mentioned previously, the turbo code has been considered to deal with the LP data. And due to the degradation which caused by the shortened symbol distance, the error performance of LP data is not sufficient by only using the turbo code. In this paper, we propose a Reed-Solomon code used outside of turbo code, and with the turbo code, it becomes a concatenated code. In this paper, there are some simulation results, within the comparison of those performances, we can see how a Reed-Solomon code is utilized for degradation of error performance which is caused by the hierarchical constellation, and how to design a Reed-Solomon code which is suitable for improving the degradation of error performance.

• Journal of Information Processing Systems
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• v.17 no.1
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• pp.191-202
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• 2021

In an Internet of Things (IoT)-configured system, each device executes on-chip software. Recent IoT devices require fast execution time of complex services, such as analyzing a large amount of data, while maintaining low-power computation. As service complexity increases, the service requires high-performance computing and more space for embedded space. However, the low performance of IoT edge devices and their small memory size can hinder the complex and diverse operations of IoT services. In this paper, we propose a remote on-demand software code execution unit using the cloudification of on-chip code memory to accelerate the program execution of an IoT edge device with a low-performance processor. We propose a simulation approach to distribute remote code executed on the server side and on the edge side according to the program's computational and communicational needs. Our on-demand remote code execution unit simulation platform, which includes an instruction set simulator based on 16-bit ARM Thumb instruction set architecture, successfully emulates the architectural behavior of on-chip flash memory, enabling embedded devices to accelerate and execute software using remote execution code in the IoT environment.

• ETRI Journal
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• v.46 no.3
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• pp.485-500
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• 2024

A hardware architecture is presented to decode (N, K) polar codes based on a low-density parity-check code-like decoding method. By applying suitable pruning techniques to the dense graph of the polar code, the decoder architectures are optimized using fewer check nodes (CN) and variable nodes (VN). Pipelining is introduced in the CN and VN architectures, reducing the critical path delay. Latency is reduced further by a fully parallelized, single-stage architecture compared with the log N stages in the conventional belief propagation (BP) decoder. The designed decoder for short-to-intermediate code lengths was implemented using the Virtex-7 field-programmable gate array (FPGA). It achieved a throughput of 2.44 Gbps, which is four times and 1.4 times higher than those of the fast-simplified successive cancellation and combinational decoders, respectively. The proposed decoder for the (1024, 512) polar code yielded a negligible bit error rate of 10^-4 at 2.7 E_b/N_o (dB). It converged faster than the BP decoding scheme on a dense parity-check matrix. Moreover, the proposed decoder is also implemented using the Xilinx ultra-scale FPGA and verified with the fifth generation new radio physical downlink control channel specification. The superior error-correcting performance and better hardware efficiency makes our decoder a suitable alternative to the successive cancellation list decoders used in 5G wireless communication.

• Journal of the Korean Institute of Telematics and Electronics
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• v.20 no.5
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• pp.23-30
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• 1983

A new runlength-limited minimum-bandwidth line code is designed by modifying the duobinary code. Since the new code is runlength limited, the need for a data scrambling before transmission is eliminated. The eye width and the error probability of the new code are shown to be almost the same as those of the duobinary code. Also, the power spectral shape is scarcely changed, so that the new code is suitable for such low-pass channels as optical fibers.