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http://dx.doi.org/10.5391/JKIIS.2009.19.2.180

Design of Low Power Error Correcting Code Using Various Genetic Operators  

Lee, Hee-Sung (연세대학교 전기전자공학부)
Hong, Sung-Jun (연세대학교 전기전자공학부)
An, Sung-Je (연세대학교 전기전자공학부)
Kim, Eun-Tai (연세대학교 전기전자공학부)
Publication Information
Journal of the Korean Institute of Intelligent Systems / v.19, no.2, 2009 , pp. 180-184 More about this Journal
Abstract
The memory is very sensitive to the soft error because the integration of the memory increases under low power environment. Error correcting codes (ECCs) are commonly used to protect against the soft errors. This paper proposes a new genetic ECC design method which reduces power consumption. Power is minimized using the degrees of freedom in selecting the parity check matrix of the ECCs. Therefore, the genetic algorithm which has the novel genetic operators tailored for this formulation is employed to solve the non-linear power optimization problem. Experiments are performed with Hamming code and Hsiao code to illustrate the performance of the proposed method.
Keywords
Error correcting code; low power; genetic algorithm; Hamming code; Hsiao code;
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