• Proceedings of the KIPE Conference
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• 2003.11a
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• pp.263-266
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• 2003

The high power factor converters are classified step-up, step-up-down and step-down converter, The power conversion system must be increased switching frequency in order to achieve a small size, a light weight and a low noise. And the power system brings on a high efficiency and high power factor. When a switch of the step down converter is operated with a commercial frequency(60Hz), a reactor using the converter is gone with a great number of harmonics waveforms of low grade. As results of this, the converter is decreased input power factor and is increased system size. To improved these, this paper proposes a PSM(Pulse Size Modulation) control strategy operated with high power factor.

• Journal of Korea Society of Digital Industry and Information Management
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• v.4 no.1
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• pp.9-16
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• 2008

This paper presents a frequency selection algorithm for minimization power consumption of processor in Mobile System. The proposed algorithm has processor designed low power processor using clock gating method. Clock gating method has improved the power dissipation by control main clock through the bus which is embedded clock block applying the method of clock gating. Proposed method has compared power consumption considered the dynamic power for processor, selected frequency has considered energy gain and energy consumption for designed processor. Or reduced power consumption with decreased processor speed using slack time. This technique has improved the life time of the mobile systems by clock gating method, considered energy and using slack time. As an results, the proposed algorithm reduce average power saving up to 4% comparing to not apply processor in mobile system.

• Journal of Power Electronics
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• v.15 no.4
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• pp.987-993
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• 2015

Wireless power transfer technologies typically include inductive coupling, magnetic resonance, and capacitive coupling methods. Among these methods, capacitive coupling wireless power transfer (CCWPT) has been studied to overcome the drawbacks of other approaches. CCWPT has many advantages such as having a simple structure, low standing power loss, reduced electromagnetic interference (EMI) and the ability to transfer power through metal barriers. In this paper, the CCWPT system with 6.78MHz class D inverter is proposed and analyzed. The proposed system consists of a 6.78MHz class D inverter with a LC low pass filter, capacitor between a transmitter and a receiver, and impedance transformers. The system is verified with a prototype for charging mobile devices.

• Journal of Power Electronics
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• v.11 no.3
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• pp.256-263
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• 2011

This paper utilizes free oscillation and energy injection principles to generate and control the high frequency current in the primary track of a contactless power transfer system. Here the primary power inverter maintains natural resonance while ensuring near constant current magnitude in the primary track as required for multiple independent loads. Such energy injection controllers exhibit low switching frequency and achieve ZCS (Zero Current Switching) by detecting the high frequency current, thus the switching stress, power losses and EMI of the inverter are low. An example full bridge topology is investigated for a contactless power transfer system with multiple pickups. Theoretical analysis, simulation and experimental results show that the proposed system has a fast and smooth start-up transient response. The output track current is fully controllable with a sufficiently good waveform for contactless power transfer applications.

• The Journal of the Korea Contents Association
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• v.5 no.1
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• pp.229-236
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• 2005

Testing time and power consumption during testing System-On-a-Chip (SOC) are becoming increasingly important as the IP core increases in a SOC. We present a new algorithm to reduce the scan-in power and test data volume using the modified scan latch reordering. We apply scan latch reordering technique for minimizing the hamming distance in scan vectors. Also, during scan latch reordering, the don't care inputs in scan vectors are assigned for low power and high compression. Experimental results for ISCAS 89 benchmark circuits show that reduced test data and low power scan testing can be achieved in all cases.

• Journal of Electrical Engineering and Technology
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• v.9 no.2
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• pp.433-440
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• 2014

In this study, a method for the low-carbon active distribution system (ADS) planning is proposed. It takes into account the impacts of both network capacity and demand correlation to the renewable energy accommodation, and incorporates demand response (DR) as an available resource in the ADS planning. The problem is formulated as a mixed integer nonlinear programming model, whereby the optimal allocation of renewable energy sources and the design of DR contract (i.e. payment incentives and default penalties) are determined simultaneously, in order to achieve the minimization of total cost and $CO_2$ emissions subjected to the system constraints. The uncertainties that involved are also considered by using the scenario synthesis method with the improved Taguchi's orthogonal array testing for reducing information redundancy. A novel cuckoo search (CS) is applied for the planning optimization. The case study results confirm the effectiveness and superiority of the proposed method.

• Journal of information and communication convergence engineering
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• v.9 no.6
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• pp.729-732
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• 2011

Power consumption during testing System-On-Chip (SOC) is becoming increasingly important as the IP core increases in SOC. We present a new algorithm to reduce the scan-in power using the modified scan latch reordering and clock gating. We apply scan latch reordering technique for minimizing the hamming distance in scan vectors. Also, during scan latch reordering, the don't care inputs in scan vectors are assigned for low power. Also, we apply the clock gated scan cells. Experimental results for ISCAS 89 benchmark circuits show that reduced low power scan testing can be achieved in all cases.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.7
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• pp.4855-4862
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• 2015

This paper proposes low price power component measurement and record system for preventing electrical safety accident and supporting accident cause analysis by periodically monitoring and recording the operation status of electrical equipments. The proposed system was designed by mainly using parts to measure accurate power component but reduce cost. Especially, low cost and high effectiveness system implementation was possible by using MAXIM 78M6631 to calculate power components in the definition of IEEE Standard 1459-2010 related power quality. The measurement performance of the developed system is tested by using standard devices such as YOKOGAWA power analyzer WT1600. The test results showed that accuracy of the developed system is less than 0.5 % and the developed system is tested in a real area to verify the operation reliability and remote monitoring performance of the system over 6 months.

• Journal of Electrical Engineering and Technology
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• v.2 no.3
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• pp.294-299
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• 2007

This paper presents a special protection scheme, which was established in the KEPCO (Korea Electric Power Corporation) system, against a critically low voltage profile in a part of the system after a double-circuit tower outage. Without establishing the scheme, the outage triggers the operation of a zone 3 relay and trips the component. This sequence of events possibly leads to a blackout of the local system. The scheme consists of an inter-substation communication network using PITR (Protective Integrated Transmitter and Receiver) for acquisition of the substations' data, and under-voltage load shedding devices. This paper describes the procedure for determining the load shedding in the scheme and the experiences of the implementation.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.52 no.3
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• pp.165-172
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• 2003

This paper presents an operation scheme to enhance the power system security by applying FACTS on Power systems. Three main generic types of FACTS devices are suggested an illustrated. Flow congestions over lines have been solved by controlling active power of series-compensated FACTS devices and low voltages at buses have been solved by controlling reactive power of shunt-compensated FACTS devices. Especially, Especially, UPFC has been applied in both line congestion and low voltages. Two kinds of indices which indicate the power system security level related to line flow and bus voltage are utilized in this paper. They have been minimized to enhance the power system security level through the iterative method and the sensitivity vector of security index is derived to determine the direction to minimum. The proposed algorithm has been tested on the IEEE 57-bus system with FACTS devices in a normal condition and a line-faulted contingency.