• Title/Summary/Keyword: Low-Power Circuit Design

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A partitioning-based synthesis algorithm for the design of low power combinational circuits under area constraints (면적 제약조건하의 저전력 조합회로 설계를 위한 분할 기반 합성 알고리즘)

  • Choi, Ick-Sung;Kim, Hyoung;Hwang, Sun-Young
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.7
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    • pp.46-58
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    • 1998
  • In this paper, we propose a synthesis algorithm for the design of low powe rcombinational circuits under area constraints. The proposed algorithm partitions a given circuit into several subcircuits such that only a selected subcircuit is activated at a time, hence reduce unnecessary signal transitions. Partitioning of a given circuit is performed through adaptive simulated annealing algorithm employing the cost function reflecting poer consumption under area constraints. Experimental reuslts for the MCNC benchmark circuits show that the proposed algorithm generates the circuits which consume less power by 61.1% and 51.1%, when compared to those generated by the sis 1.2 and the precomputation algorithm, respectively.

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Design of a Low Noise Amplifier for Wireless LAN (무선 근거리 통신망용 저잡음 증폭기의 설계)

  • 류지열;노석호;박세현
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.6
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    • pp.1158-1165
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    • 2004
  • This paper describes the design of a two stage 1V power supply SiGe Low Noise Amplifier operating at 5.25㎓ for 802.lla wireless LAN application. The achieved performance includes a gain of 17㏈, noise figure of 2.7㏈, reflection coefficient of 15㏈, IIP3 of -5㏈m, and 1-㏈ compression point of -14㏈m. The total power consumption of the circuit was 7㎽ including 0.5㎽ for the bias circuit.

A Drive Method of SRM for EPS with High Efficiency & Low Torque Ripple (EPS용 SRM의 고효율 저토크리플 구동방식)

  • Hwang H.J.;Moon J.W.;Kim J.K.;Ahn J.W.
    • Proceedings of the KIPE Conference
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    • 2003.07b
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    • pp.832-835
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    • 2003
  • This paper presents a design and characteristics analysis of a SRM drive for EPS(Electrically Power Steering) application. A conventional driving room space and mechanical structure are suggested in design stage. In the restricted design conditions, motor parameters are determined for sufficient torque and speed. For the smooth torque generation and simple circuit of power system, 12/8 motor drive is considered. With FEM and magnetic circuit analysis, designed motor is simulated to meet the requirement of specifications. Effectiveness of the suggested SRM drive for EPS application is verified by the manufactured prototype motor drive tests.

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Low Power ADC Design for Mixed Signal Convolutional Neural Network Accelerator (혼성신호 컨볼루션 뉴럴 네트워크 가속기를 위한 저전력 ADC설계)

  • Lee, Jung Yeon;Asghar, Malik Summair;Arslan, Saad;Kim, HyungWon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.11
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    • pp.1627-1634
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    • 2021
  • This paper introduces a low-power compact ADC circuit for analog Convolutional filter for low-power neural network accelerator SOC. While convolutional neural network accelerators can speed up the learning and inference process, they have drawback of consuming excessive power and occupying large chip area due to large number of multiply-and-accumulate operators when implemented in complex digital circuits. To overcome these drawbacks, we implemented an analog convolutional filter that consists of an analog multiply-and-accumulate arithmetic circuit along with an ADC. This paper is focused on the design optimization of a low-power 8bit SAR ADC for the analog convolutional filter accelerator We demonstrate how to minimize the capacitor-array DAC, an important component of SAR ADC, which is three times smaller than the conventional circuit. The proposed ADC has been fabricated in CMOS 65nm process. It achieves an overall size of 1355.7㎛2, power consumption of 2.6㎼ at a frequency of 100MHz, SNDR of 44.19 dB, and ENOB of 7.04bit.

Design of Low Power LTPS AMOLED Panel and Pixel Compensation Circuit with High Aperture Ratio (고 개구율 화소보상회로를 갖는 저전력 LTPS AMOLED 패널 설계)

  • Kang, Hong-Seok;Woo, Doo-Hyung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.10
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    • pp.34-41
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    • 2010
  • We proposed the new pixel compensation circuit with high aperture ratio and the driving method for the large-area, low-power AMOLED applications in this study. We designed with the low-temperature poly-silicon(LTPS) thin film transistors(TFTs) that has poor uniformity but good mobility and stability. To lower the error rate of the pixel circuit and to improve the aperture ratio for bottom emission method, we simplified the pixel compensation circuit. Because the proposed pixel compensation circuit with high aperture ratio has very low contrast ratio for conventional driving methods, we proposed the new driving method and circuit for high contrast ratio. Black data insertion was introduced to improve the characteristics for moving images. The pixel circuit was designed for 19.6" WXGA bottom-emission AMOLED panel, and the average aperture ratio of the pixel circuit is improved from 33.0% to 41.9%. For the TFT's $V_{TH}$ variation of ${\pm}0.2\;V$, the non-uniformity and contrast ratio of the designed panel was estimated under 6% and over 100000:1 respectively.

A High Performance Three-Phase Telecom Supply Incorporating a HF Switched Mode Rectifier with a Phase Shifted PWM Controller

  • Shahani, Arushi;Singh, Bhim;Bhuvaneshwari, G.
    • Journal of Power Electronics
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    • v.10 no.3
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    • pp.219-227
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    • 2010
  • Telecom supplies need to conform to low Total Harmonic Distortion (THD) and high Power Factor (PF) as per IEC 61000-3-2 and IEEE 519-1992 standards. These high rating power supplies use a three phase utility in which low THD and high PF are realized via various passive and active wave shaping schemes. In this paper, a new design for three phase telecom power supplies is presented with circuit parameter values optimized for high performance in terms of a low THD, high PF, low ripple and high line and load regulation using a suitable combination of various strategies. The performance of the power supply is validated by extensive simulations.

The Power Amplifier Control Design of eLoran Transmitter

  • Son, Pyo-Woong;Seo, Kiyeol;Fang, Tae Hyun
    • Journal of Positioning, Navigation, and Timing
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    • v.10 no.3
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    • pp.229-234
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    • 2021
  • In this paper, a study was conducted on the power amplifier control required to design an eLoran transmitter system using a low-height antenna. The eLoran transmitter developed during the eLoran technology development project conducted in Korea used a small 35 m antenna due to the difficulty of securing a site for antenna installation. This antenna height is very low compared to the height of 750 m which is required for eLoran 100 kHz signal transmission without any radiation loss. In the case of using such a small antenna, not only the radiation efficiency of the transmission is lowered, but also the power module control must be performed more precisely in order to transmit the eLoran standard signal. The equivalent RLC circuit of the transmitter system was implemented and transient analysis was conducted to derive the input required voltage for satisfying the output requirement. The voltage waveform was also generated by the RLC circuit analysis to generate the eLoran signal. Furthermore, we suggest power width modulation method to control eLoran power amplifier module more sophisticatedly.

A Study on Analysis and Design of HVC Embedded High Frequency Transformer for Microwave Oven (Microwave Oven용 커패시터 내장형 고주파변압기의 해석 및 설계에 관한 연구)

  • 박강희
    • Proceedings of the KIPE Conference
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    • 2000.07a
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    • pp.90-94
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    • 2000
  • A conventional power supply to drive a microwave oven has ferro-resonant transformer and high voltage capacitor(HVC). Though it is simple transformer is bulky heavy and has low-efficiency. To improve this defect a high frequency switching inverter-type power supply has been investigated an developed. in recent years. But because of it's additional circuit and devices inverter-type power supply is more expensive than conventional one. In this paper The design procedure of a novel HVC embedded high frequency transformer is proposed for down-sizing and cost reduction. Also transformer equivalent circuit model is derived by FEM analysis and parameter measurements. And the operation of proposed HVC embedded transformer is verified by simulation and experimental results.

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A Study on Analysis and Design of HVC Embedded High Frequency Transformer for Microwave Oven (Inverter 구동 Microwave Oven용 HVC 내장형 고주파변압기의 해석 및 설계에 관한 연구)

  • Park, K.H.;Cho, J.S.;Mok, H.S.;Choe, G.H.
    • Proceedings of the KIEE Conference
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    • 2001.04a
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    • pp.293-296
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    • 2001
  • A conventional power supply to drive a microwave oven has ferro-resonant transformer and high voltage capacitor(HVC). Though it is simple, transformer is bulky, heavy and has low-efficiency. To improve this defect, a high frequency inverter type power supply has been investigated and developed in recent years. But, because of additional control circuit and switching device, inverter-type power supply is more expensive than conventional one. In this study, The design procedure of a novel HVC embedded high frequency transformer is proposed for down-sizing and cost reduction of Inverter-type power supply. Also, equivalent circuit mode] is derived by FEM analysis and impedance measurements. And the operation of proposed HVC embedded transformer is verified by simulations and experimental results.

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The Novel Control Circuit Design and Implementation for an AIS Power Amplifier Module (AIS용 전력 증폭기 모듈의 새로운 출력 제어 회로 설계 및 제작)

  • 한재룡;이종환;염경환
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.3
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    • pp.251-257
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    • 2004
  • AIS(Automatic Identification System), was suggested for the navigational data communication between ships and between ships and shore stations for the better safety of navigation, and it requires two different the transmitting output power level depending on its operating mode. According to ITU's recommendation, these levels should reach within 20 % of its final value in 1 ms. In this paper, an adequate feedback control circuit for power amplifier module is designed and implemented.