• Title/Summary/Keyword: Low-Power Bus

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Study on minimizing Extremely-Low-Frequency magnetic fields around power cables and busbars (송전선과 분전반 모선으로부터 발생하는 극저주파 자기장 저감을 위한 연구)

  • Lou, Ming;Jeung, Gi-Woo;Kim, Dong-Hun
    • Proceedings of the KIEE Conference
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    • 2009.04b
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    • pp.88-90
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    • 2009
  • Extremely-Low-Frequency(ELF) magnetic fields are generated around power cables and bus bars in power systems. Such the stray fields may cause disturbances to nearby electronic apparatus and affect even human health. In order to seeking out a proper way to reducing the fields, the first thing to do is to accurately predict field distribution around analysis models of interest. Then, optimization techniques should be applied for finding a more improved design than the initial one. To achieve this goal, commercial electromagnetic software, MagNet, is combined with evolution strategy algorithm. For verification of the proposed method, three-phase power line cables and busbar systems have been tested.

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Performance Evaluation of Distributed MAC Protocol Algorithm for Efficient Multimedia Transmission (효율적인 멀티미디어 전송을 위한 분산방식 MAC 프로토콜 성능분석)

  • Kim, Jin Woo;Lee, Seong Ro
    • Journal of Korea Multimedia Society
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    • v.17 no.5
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    • pp.573-581
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    • 2014
  • The salient features of UWB(Ultra WideBand) networks such as high-rate communications, low interference with other radio systems, and low power consumption bring many benefits to users, thus enabling several new applications such as wireless universal serial bus (WUSB) for connecting personal computers (PCs) to their peripherals and the consumer-electronics (CE) in people's living rooms. Because the size of multimedia data frame, WiMedia device must transmit the fragment of MSDU. However, when the fragment of MSDU is lost, WiMedia device maintains active mode for the time to complete the transmission MSDU, and there is a problem that unnecessary power consumption occurs. Therefore we propose new power management scheme to reduce unnecessary power consumption of WiMedia devices in the case that the fragment is lost.

Low-Power Multiplication Processing Element Hardware to Support Parallel Convolutional Neural Network Processing (합성곱 신경망 병렬 연산처리를 지원하는 저전력 곱셈 프로세싱 엘리먼트 설계)

  • Eunpyoung Park;Jongsu Park
    • Journal of Platform Technology
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    • v.12 no.2
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    • pp.58-63
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    • 2024
  • CNNs tend to take a long time to learn and consume a lot of power due to lack of system resources with many data processing units when there are repetitive handles that do not have high performance in the image field. In this paper, we propose a handling method based on a low-power bus that can increase the exchange rate of multipliers and multiplicands within the convolution mixer, which is a tendency activity that occurs when a convolution mixer has multiplication, which is the core element of combination. Convolutional neural networks have proprietary low-power shared processor support and the design was implemented on an Intel DE1-SoC FPGA board using Verilog-HDL. The experiments validated the performance by comparing it with the exchange rate of the multiplier originally proposed by Shen on MNIST's numeric image database.

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Components sizing of powertrain for a Parallel Hybridization of the Mid-size Low-Floor Buses (중형저상버스 병렬형 하이브리드화를 위한 동력전달계 용량매칭)

  • Kim, Gisu;Park, Yeong-il;Ro, Yun-sik;Jung, Jae-wook
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.8
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    • pp.582-594
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    • 2016
  • Most studies on hybrid buses are on large-sized buses and not mid-sized low-floor buses. This study uses MATLAB simulation to evaluate the fuel efficiency of such buses powered by diesel. Based on the results, a hybrid electric vehicle system is recommended for the best combination of power and gear ratio. A parallel hybrid system was selected for the hybridization, which transmits front and rear wheel power independently. The necessary power to satisfy the target performance was calculated, and the applicable capacity area was designed. Dynamic programing was used to create and optimize a component sizing algorithm, which was used to scale the capacity of each component of the power source to satisfy the design criteria. The fuel efficiency rate, optimum power source capacity, and gear ratio can be improved by converting a conventional bus into a parallel hybrid bus.

A Study on Power Trading Methods for in a Hydrogen Residential Model (수소주거모델의 전력 거래 참여 방안 고찰)

  • KISEOK JEONG;TAEYOUNG JYUNG
    • Journal of Hydrogen and New Energy
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    • v.34 no.2
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    • pp.91-99
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    • 2023
  • Participation in power trading using surplus power is considered a business model active in the domestic energy trade market, but it is limited only if the legal requirements according to the type, capacity, and use of the facilities to be applied for are satisfied. The hydrogen residential demonstration model presented in this paper includes solar power, energy storage system (ESS), fuel cell, and water electrolysis facilities in electrical facilities for private use with low-voltage power receiving system. The concept of operations strategy for this model focuses on securing the energy self-sufficiency ratio of the entire system, securing economic feasibility through the optimal operation module installed in the energy management system (EMS), and securing the stability of the internal power balancing issue during the stand-alone mode. An electric facility configuration method of a hydrogen residential complex demonstrated to achieve this operational goal has a structure in which individual energy sources are electrically connected to the main bus, and ESS is also directly connected to the main bus instead of a renewable connection type to perform charging/discharging operation for energy balancing management in the complex. If surplus power exists after scheduling, participation in power trading through reverse transmission parallel operation can be considered to solve the energy balancing problem and ensure profitability. Consequentially, this paper reviews the legal regulations on participation in electric power trading using surplus power from hydrogen residential models that can produce and consume power, gas, and thermal energy including hybrid distributed power sources, and suggests action plans.

An Improved Synchronization Control Scheme of a Low Cost 400Hz Power Supply for No-Break Power Transfer (저가격 고 신뢰성의 400Hz 전원의 무순단 전력절환용 개선된 동기화 기법)

  • Joung, Seok-Eon;Hyun, Dong-Seok
    • The Transactions of the Korean Institute of Power Electronics
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    • v.19 no.5
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    • pp.470-474
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    • 2014
  • This study proposes an improved synchronization control scheme for a low-cost 400Hz power supply for a no-break power transfer system. In the case of aircraft applications, the 400Hz power supply called ground power units is accepted and used as the external electrical power system during stopovers on ground. A momentary break in the supply occurs when shifting from one power source to another. To allow shifting without a break in the supply, the two power sources are momentarily connected in parallel. The proposed synchronization control is achieved by connecting an existing synchronization bus to the voltage zero-crossing signal of a generator power with discrete logic ICs and analog circuits. Therefore, unlike expensive controllers, such as DSP and CAN, the proposed control scheme is rather simple and may decrease operational cost. The practical feasibility of the proposed control scheme is proven by experimental results.

Low-Cost CRC Scheme by Using DBI(Data Bus Inversion) for High Speed Semiconductor Memory (고속반도체 메모리를 위한 DBI(Data Bus Inversion)를 이용한 저비용 CRC(Cyclic Redundancy Check)방식)

  • Lee, Joong-Ho
    • Journal of IKEEE
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    • v.19 no.3
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    • pp.288-294
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    • 2015
  • CRC function has been built into the high-speed semiconductor memory device in order to increase the reliability of data for high-speed operation. Also, DBI function is adopted to improve of data transmission speed. Conventional CRC(ATM-8 HEC code) method has a significant amounts of area-overhead(~XOR 700 gates), and processing time(6 stage XOR) is large. Therefore it leads to a considerable burden on the timing margin at the time of reading and writing of the low power memory devices for CRC calculations. In this paper, we propose a CRC method for low cost and high speed memory, which was improved 92% for area-overhead. For low-cost implementation of the CRC scheme by the DBI function it was supplemented by data bit error detection rate. And analyzing the error detection rate were compared with conventional CRC method.

Small Active Command Design for High Density DRAMs

  • Lee, Kwangho;Lee, Jongmin
    • Journal of the Korea Society of Computer and Information
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    • v.24 no.11
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    • pp.1-9
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    • 2019
  • In this paper, we propose a Small Active Command scheme which reduces the power consumption of the command bus to DRAM. To do this, we target the ACTIVE command, which consists of multiple packets, containing the row address that occupies the largest size among the addresses delivered to the DRAM. The proposed scheme identifies frequently referenced row addresses as Hot pages first, and delivers index numbers of small caches (tables) located in the memory controller and DRAM. I-ACTIVE and I-PRECHARGE commands using unused bits of existing DRAM commands are added for index number transfer and cache synchronization management. Experimental results show that the proposed method reduces the command bus power consumption by 20% and 8.1% on average in the close-page and open-page policies, respectively.

Design and Implementation of e2eECC for Automotive On-Chip Bus Data Integrity (차량용 온칩 버스의 데이터 무결성을 위한 종단간 에러 정정 코드(e2eECC)의 설계 및 구현)

  • Eunbae Gil;Chan Park;Juho Kim;Joonho Chung;Joosock Lee;Seongsoo Lee
    • Journal of IKEEE
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    • v.28 no.1
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    • pp.116-122
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    • 2024
  • AMBA AHB-Lite bus is widely used in on-chip bus protocol for low-power and cost-effective SoC. However, it lacks built-in error detection and correction for end-to-end data integrity. This can lead to data corruption and system instability, particularly in harsh environments like automotive applications. To mitigate this problem, this paper proposes the application of SEC-DED (Single Error Correction-Double Error Detection) to AMBA AHB-Lite bus. It aims not only to detect errors in real-time but also to correct them, thereby enhancing end-to-end data integrity. Simulation results demonstrate real-time error detection and correction when errors occur, which bolsters end-to-end data integrity of automotive on-chip bus.

Design of a Low-order Pole Placement Power System Stabilizer Using Simultaneous Stabilization (동시안정화를 이용한 저차원 극배치 전력계통안정화장치 설계)

  • Kim, Seog-Joo;Lee, Jong-Moo;Kwon, Soon-Man
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.10
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    • pp.1708-1712
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    • 2008
  • This paper describes a linear matrix inequality (LMI) approach to the design of robust low-order power system stabilizers (PSSs), which are used to damp out local-mode oscillations of synchronous generators. The performance of a PSS is expressed as the location of the closed-loop poles, and a single fixed-gain pole-placement controller is synthesized for a wide range of operating conditions. The synthesis results in simultaneous regional pole-placement stabilization. and is formulated as an LMI feasibility problem with a rank condition. A penalty method is applied to solve the rank-constrained LMI problem. Numerical experiments with a single-machine connected to an infinite bus system were performed to demonstrate the proposed method.