• Progress in Superconductivity and Cryogenics
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• v.5 no.1
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• pp.31-34
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• 2003

Bi-2223 superconducting wires with 55 filaments were fabricated by stacking, drawing process with different heat-treatment histories. Two kinds of powders were prepared. One was pre-annealed at 760-820 $^{\circ}C$ and low oxygen partial pressure, and the other was only calcined state. Before rolling process, round wires were pre-annealed at 760 -820 $^{\circ}C$ and in a low oxygen partial pressure. We confirmed that pre-annealing step was to transform Bi-2212 orthorhombic structure from Bi-2212 tetragonal structure and to reduce the formation of second phases at superconducting wire. However Bi-2223 phases were formed at higher pre-annealing temperature. Bi-2223 conductor was needed frequently annealing at low temperature because pre-annealing at precursor powder brought about decrease in workability. We could achieve highest Je of 6500 A/$\textrm{cm}^2$ at the tape using Bi-2212 orthorhombic phase by introduced slightly overheating at the 1st sintering process.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.140-140
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• 2010

Non-mass analyzed ion shower doping (ISD) technique with a bucket-type ion source or mass-analyzed ion implantation with a ribbon beam-type has been used for source/drain doping, for LDD (lightly-doped-drain) formation, and for channel doping in fabrication of low-temperature poly-Si thin-film transistors (LTPS-TFT's). We reported an abnormal activation behavior in boron doped poly-Si where reverse annealing, the loss of electrically active boron concentration, was found in the temperature ranges between $400^{\circ}C$ and $650^{\circ}C$ using isochronal furnace annealing. We also reported reverse annealing behavior of sequential lateral solidification (SLS) poly-Si using isothermal rapid thermal annealing (RTA). We report here the importance of implantation conditions on the dopant activation. Through-doping conditions with higher energies and doses were intentionally chosen to understand reverse annealing behavior. We observed that the implantation condition plays a critical role on dopant activation. We found a certain implantation condition with which the sheet resistance is not changed at all upon activation annealing.

• Journal of Information Display
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• v.4 no.4
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• pp.1-3
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• 2003

For excimer laser annealing (ELA), energy density, number of pulses, beam uniformity, and condition of initial amorphous Si (a-Si) films are significant factors contributing to the final microstructure and the performance of low-temperature polycrystalline Si (LTPS) TFTs. Although the process and equipment have been significantly improved, the environmental factors associated with initial amorphous Si (a-Si) films and process conditions are yet to be optimized.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2006.05a
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• pp.159-163
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• 2006

The effects of annealing temperature and time on mechanical properties and microstructures were studied in cold drawn pearlitic steel wires containing 0.84wt% Si. Annealing was performed from $200^{\circ}C$ to $450^{\circ}C$ with different time of 30sec, 1min, 15min and 1hr. The increase of tensile strength at low temperature was related with strain ageing. The decrease of tensile strength at high annealing temperature was related with spherodization of cementite and the occurrence of recovery of the lamellar ferrite in the pearlite. The improvement of ductility was connected with spherodization of cementite plate in pearlite and recovery process by reduction of high dislocation density at short time annealing temperature of $400^{\circ}C$.

• Proceedings of the KIEE Conference
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• 1992.07a
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• pp.288-289
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• 1992

The method of simulated annealing is a technique that has recently attracted significant attention as suitable for optimization problem of very large scale. If the temperature is too high, then some of the structure created by the heuristic will be destroyed and unnecessary extra work will be done. If it is too low then solution is lost, similar to the case of a quenching cooling schedule in the Simulated Annealing (SA) phase. Therefore, a crucial issue in this study is the determination of the starting temperature and cooling schedule for SA phase.

• Progress in Superconductivity
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• v.1 no.1
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• pp.9-13
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• 1999

The influence of quenching temperature and annealing time on superconducting characteristics has been investigated for a $(Pb_{0.6}V_{0.4})Sr_2(Ca_{0.65}Er_{0.35})Cu_2O_z$ compound. From the resistivity measurements for samples annealed at $400^{\circ}C$ to $860^{\circ}C$ in oxygen and subsequently quenched, it is observed that $T_c$(zero) of the sample decreases with the increase of annealing temperature up to $600^{\circ}C$ and increases again beyond $700^{\circ}C$. Annealings of the sample at $860^{\circ}C$ show that $T_c$(zero) goes through a maximum of 62K with the increase of the annealing time. It is also found that $T_c$(zero) of the sample quenched from high temperature decreases when the sample is subjected to low temperature annealing below. $600^{\circ}C$ in oxygen. The experimental results indicate that the as-prepared samples contain excessive oxygen and removal of this excessive oxygen in as-prepared samples is a key factor in controlling the superconducting properties of the samples and are discussed in connection with thermal gravimetric measurements.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.333-336
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• 2006

High Pressure Annealing System was developed to improve the characteristics of low-temperature poly-silicon thin film transistors.. (TFTs). The high-pressure steam annealing was applied to the poly-silicon film made by rapid thermal annealing method. The carrier lifetime was investigated by Microwave detection of the Photo-Conductive Decay and the increase of carrier lifetime which indicates the reduction of the defect was observed by high-pressure steam annealing of 1MPa 600C 1hour.

• The Korean Journal of Ceramics
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• v.6 no.2
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• pp.110-115
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• 2000

$SrBi_2Ta_2O_9$ thin films were deposited at room temperature on the usual (111) oriented Pt bottom electrodes using r.f. magnetron sputtering, and then post-annealed at 650-$800^{\circ}C$ for 30min in oxygen flow. Low temperature processing which shows the preferred oriented SBT thin films was obtained by controlling the sputtering pressure and/or Sr content in target. The orientation and grain growth behavior of SBT thin films were dependent on Sr contents in films. With increasing the excess Bi content up to 50% in SBT thin films, it was possible to lower the onset temperature of grain growth. The c-axis preferred oriented SBT thin films were well-grown under the condition of low post-annealing($650^{\circ}C$) by lowering post-annealing pressure. After $10^{11}$ switching cycles, no polarization degradation was observed in both preferred oriented SBT capacitors.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.692-695
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• 1999

This paper presents annealing characteristics of CrN thin-film strain gauges, which were deposited on glass by DC reactive magnetron sputtering in an argon-nitrogen atmosphere)Ar-(5-~25%)$N_2$. The physical and electrical characteristics of these films investigated with the thickness range 3500$\AA$ of CrN thin films, annealing temperature (100~30$0^{\circ}C$) and annealing time (24-72hr) . The optimized condition of CrN thin-film strain gauges were thickness range of 3500$\AA$ and annealing condition(30$0^{\circ}C$ , 48hr) in Ar-10%$N_2$ deposition atmosphere. Under optimum conditions, the CrN thin-films for strain gauge is obtained a high resistivity, $\rho$=1147.65$\Omega$cm a low temperature coefficient of 11.17. And change in resistance after annealing for the CrN thin film were quitely linear and stable.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.396-399
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• 2009

Thin-film transistors (TFTs) with an aluminum indium oxide (AIO) channel layer were fabricated via a simple and low-cost sol-gel process. Effects of annealing temperature and time were investigated for better TFT performance. The sol-gel AIO TFTs were annealed as low as $350^{\circ}C$. They exhibit n-type semiconductor behavior, a mobility higher than 19 $cm^2/V{\cdot}s$ and an onto-off current ratio greater than $10^8$.