• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.11a
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• pp.151-154
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• 1998

We have investigated a correlation of the electrical properties of the Pd/Ge/Pd/Ti/Au ohmic contact on n-InGaAs with its microstructures for the high temperature application of compound semiconductor devices. The samples were heat-treated by the rapid thermal annealing at various temperatures. In the contact system, moderately good specific contact resistance was obtained even before annealing because of the low metals-InGaAs barrier height, and better ohmic performances were observed by annealing up to 400˚C. But the ohmic performance was degraded after annealing at 450˚C due to the increment of Pd$_2$Ga$\sub$5/ phases.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.03b
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• pp.14-14
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• 2010

Recently, low temperature co-fired ceramic (LTCC) technology has gained a remarkable application potential in sensors, actuators and micro systems fields because of its very good electrical and mechanical properties, high reliability and stability as well as possibility of making 3D micro structures. In this study, we investigated the effects of annealing treatment on the electrical properties of $Pb(ZrTi)O_3$ (PZT) thin films deposited on LTCC substrate. PZT thin films were deposited on Au / LTCC substrates by RF magnetron sputtering method. Then, the change of the crystallization of the films were investigated under various annealing temperatures and times. The results showed that the crystallization of the films were enhanced as increasing annealing temperatures. The film, annealed at $700^{\circ}C$, 3min, was well crystallized in the perovskite structure.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1988.05a
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• pp.52-55
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• 1988

Tunsten silicide (WSix) films on polycrystalline silicon were formed by low-pressure chemical vapor deposition (LPCVD) and were annealed in $N_2$ for 30 mins at various temperatures. The annealing behaviors of tungsten silicide films have been investigated by electrical resistivity measurements, X-ray diffraction methods, scanning electron microscopy (SEM) and Hall measurements. The electrical resistivity decreased almost linearly with increasing annealing temperature and reached $35{\mu}{\Omega}-cm$ at $1000^{\circ}C$ annealing. The X-ray and SEM analyses indicate that crystallization of $WSi_2$ and grain growth occurs when annealed above $1000^{\circ}C$. Excess silicon redistribution occurs considerably when annealed above $1000^{\circ}C$. By Hall measurements, the carrier type for specimens annealed at $1000^{\circ}C$ was found to be positive holes, while the carriers were electrons in the specimens that were annealed at $800^{\circ}C$.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.336-336
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• 2011

AMOLED에 대한 관심이 높아짐에 따라 LTPS (Low Temperature Poly Silicon) TFT에 대한 연구가 활발히 이루어지고 있다. 다결정 실리콘은 단결정 실리콘에 비해 100 cm2/V 이상의 이동도를 보이는 우수한 특성으로 인해 AMOLED 디스플레이에 적합하며 여러 기업에서 LTPS 공정을 이용한 TFT제작을 연구 중이다. LTPS 공정은 현재 ELA (Excimer Laser Annealing) 방식으로 대면적 유리기판에 ELA 방법을 적용함에 있어 설비투자 비용이 지나치게 높아진다는 단점을 가지고 있다. 설비투자 비용의 문제점을 해결하기 위해 Diode Laser을 이용하여 Annealing하는 방법에 대해 연구하였다. 본 연구는 Diode Laser Annealing 방식을 이용하여 poly-Si을 구현하였다. 단결정 실리콘을 제작하기 위해 ICP-CVD장비를 이용하여 150$^{\circ}C$에서 SiH4, He2 혼합, He/SiH4의 flow rate는 20/2[sccm], RF power는 400 W에서 700 W으로 가변, 증착 압력은 25mTorr으로 하였다. 940 nm 파장의 30 W Diode Laser를 8 mm Spot Size로 a-Si에 순간 조사하여 결정화, 그 결과 grain을 형성한 polycrystalline 구조를 확인하였다.

• Korean Journal of Materials Research
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• v.34 no.2
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• pp.79-84
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• 2024

Thin films of yttria-stabilized zirconia (YSZ) nanoparticles were prepared using a low-temperature deposition and crystallization process involving successive ionic layer adsorption and reaction (SILAR) or SILAR-Air spray Plus (SILAR-A+) methods, coupled with hydrothermal (175 ℃) and furnace (500 ℃) post-annealing. The annealed YSZ films resulted in crystalline products, and their phases of monoclinic, tetragonal, and cubic were categorized through X-ray diffraction analysis. The morphologies of the as-prepared films, fabricated by SILAR and SILAR-A+ processes, including hydrothermal dehydration and annealing, were characterized by the degree of surface cracking using scanning electron microscopy images. Additionally, the thicknesses of the YSZ thin films were compared by removing diffusion layers such as spectator anions and water accumulated during the air spray plus process. Crack-free YSZ thin films were successfully fabricated on glass substrates using the SILAR-A+ method, followed by hydrothermal and furnace annealing, making them suitable for application in solid oxide fuel cells.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.18 no.2
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• pp.82-90
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• 2019

In this paper, the effects of different 3D printing conditions including oil lubrication and annealing are observed for their effects on tensile testing. In 3D printing, a press-out extrude filament is rapidly heated and cooled to create internal stress in the printed part. The 3D printing internal stress can be removed using oil-coated filament and annealing. During the oven cooling at an annealing temperature of $106^{\circ}C$, the stress of the specimens with laminated angle $0^{\circ}$ tends to increase by 12.6%, and that of the oil-coated filament printing specimens is increased by 17%. At the annealing temperature of $106^{\circ}C$, the stress of the oil-coated filament printing specimens tends to increase by 35%. In this study, we have found that the oil lubrication and annealing remove the internal stresses and increase the strength of the printed specimens. The oil lubrication and annealing reform the crystalline structures to even out the areas of high and low stress, which creates fewer fragile areas. These results are very useful for the manufacture of 3D printing products with a suitable mechanical strength for applications.

• Journal of the Microelectronics and Packaging Society
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• v.9 no.3
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• pp.1-6
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• 2002

A low temperature process technology of copper thin films has been developed by a chemical vapor deposition technology for multi-level metallzations in ULSI fabrication. The copper films were deposited on TiN/Si substrates in helium atmosphere with the substrate temperature between $130^{\circ}C$ and $250^{\circ}C$. In order to get more reliable metallizations, effects on the post-annealing treatment to the electrical properties of the copper films have been investigated. The Cu films were annealed at the $5 \times10^{-6}$ Torr vacuum condition and the electrical resistivity and the nano-structures were measured for the Cu films. The electrical resistivity of Cu films shown to be reduced by the post-annealing. The electrical resistivity of 2.0 $\mu \Omega \cdot \textrm{cm}$ was obtained for the sample deposited at the substrate temperature of $180^{\circ}C$ after vacuum annealed at $300^{\circ}C$. The resistivity variations of the films was not exactly matched with the size of the nano-structures of the copper grains, but more depended on the contamination of the copper films.

• Proceedings of the Materials Research Society of Korea Conference
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• 1999.11a
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• pp.76-76
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• 1999

Low resistance ohmic contacts to the Si-doped InGaN(~$\times$10$^{19}$ ㎤) were obtained using the W metallization schemes. Specific contact resistance decreased with increasing annealing temperature. The lowest resistance is obtained after a nitrogen ambient annealing at 95$0^{\circ}C$ for 90s, which results in a specific contact resistance of 2.75$\times$10$^{-8}$ Ω$\textrm{cm}^2$. Interfacial reactions and surface are analyzed using x-ray diffraction, transmission electron microscopy (TEM) and scanning electron microscopy (SEM). The X-ray diffraction results show that the reactions between the W film and the InGaN produce a $\beta$-W$_2$N phase at the interface. TEM results also show that the $\beta$-W$_2$N has a rough interface, which increase contact area. It shows that the morphology of the contacts is stable up to a temperature as high as 95$0^{\circ}C$. Possible mechanisms are proposed to describe the annealing temperature dependence of the specific contact resistance.

• Journal of the Korean Institute of Telematics and Electronics
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• v.20 no.5
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• pp.50-55
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• 1983

A comprehensive study of the electrical properties of low-dose Si implants in Cr-doped GaAs substrates has been made using the Hall-effect/sheet-resistivity measurement technique for various ion doses and annealing temperatures. The samples were implanted at room temperature and annealed with silicon nitride encapsulants in a hydrogen atmosphere for 15 minutes. H-type layers were produced at all dose levels investigated, and the optimum annealing temperature was 850$^{\circ}C$ for all doses. The highest electrical activation efficiency was 89% for Cr-doped GaAs substrates. Depth profiles of carrier concentrations and mo-bilities are highly dependent upon ion dose and annealing temperature. Significant im-plantation damage still remains after an 800$^{\circ}C$ anneal, and a 900$^{\circ}C$ anneal produces signi-ficant outdiffusion as well as indiffusion of the implanted Si ions.

• Korean Journal of Materials Research
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• v.4 no.3
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• pp.295-300
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• 1994

This paper is aimed to study the effect of Pd activator, the annealing temperature, and operating temperatures on the response characteristics of the $SnO_2/Al_2O_3$ sensor. The resistance of device has shown minimum value when annealing temperature and operating temperature of device are $550^{\circ}C$ and $350^{\circ}C$ respectively in ethanol gas. And the response characteristics of the device showed the best results when lwt% Pd was added to SnOz especially in low concentration of ethanol gas.