• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.1
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• pp.53-57
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• 2012

In this paper, by designing 20 W class driving circuit for driving high-power LED (Light Emitting Diode), we are going to comparatively carry out the analysis of characteristics for power circuit according to each design method. In this case, 200 V 60 Hz was performed as input data. The electrical characteristics such as voltage, current and ripple are checked for constant current circuit and constant voltage circuit in the LED module. In addition, as the ripple has an influence on illumination of LED light, low temperature working (-20 [$^{\circ}C$]) and high temperature working(80 [$^{\circ}C$]) are measured to make sure the ripple characteristics in accordance with temperature. In low temperature operation -20 [$^{\circ}C$] measurements, both constant current circuit and constant-voltage circuit were less impacted on input fluctuation, whereas in the high temperature operation 80 [$^{\circ}C$], current voltage in constant voltage circuit was surge after 430 [hour]. Voltage current ripple of constant current circuit was much less than constant voltage circuit, therefore we can show that constant current circuit is more stable.

• Journal of Advanced Marine Engineering and Technology
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• v.31 no.8
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• pp.975-982
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• 2007

The single-phase switched reluctance motor(SRM) drive requires DC source which is generally supplied through a rectifier connected with a commercial source. The rectifier is consist of a diode full bridge and a filter circuit. Usually the filter circuit uses capacitor with large value capacitance to reduce ripple component of DC power. Although the peak torque ripple of SRM is small, the short charge and discharge current of the filter capacitor draws the low power factor and system efficiency. A modified single phase SRM drive system is presented in this paper, which includes drive circuit realizing reduction of torque ripple and improvement of power factor. In the proposed drive circuit, one switching part and diode which can separate the output of AC/DC rectifier from the filter capacitor is added. Also, a upper switch of drive circuit is exchanged a diode in order to reduce power switching device. Therefore the number of power switch device is not changed, two diodes are only added in the SRM drive. To verify the proposed system, some simulation and experimental results are presented.

• Journal of Power System Engineering
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• v.3 no.1
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• pp.55-59
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• 1999

Generally, T.G(Tacho-generator, Tachometer) sensor is used widely for sensing the angular velocity in rotary machine. By limitation of T.G sensor's structure, the sensed angular velocity include a periodic noise, and the noise is called "ripple" as an electrical term. To reduce the effecting of the ripple, many kinds of filters are designed and installed, but there is necessary a trade off between response time and adapted frequency band. In this paper, we propose a generalized observer to estimate an angular velocity from the output signal of T.G sensor. The generalized observer is proposed firstly for continue systems, and it is applied to DC servo motor with T.G sensor. For simulation, we measure T.G signals at 60, 400, 570 rpm respectively, and analysis those to obtain the resonance frequency of ripple by FFT method. To verify the effectiveness of the proposed algorithm, we compare the results with those of a RC low frequency band filter.

• Proceedings of the KIPE Conference
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• 2000.07a
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• pp.305-308
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• 2000

A technique to suppress the low frequency ripple voltage of the DC output in three phase buck diode rectifiers is presented in this paper. The proposed pulse frequency modulation methods and duty ratio modulation methods are employed to regulate the output voltage of the buck diode rectifiers and guarantee zero-current -switching(ZCS) of the switch over the wide load range The proposed control methods used in this paper provide generally good performance such as low THD of the input line current and unity power factor. IN addition control methods can be effectively used to suppress the low frequency ripple voltage appeared in the dc output voltage. The harmonic injection technique illustrates its validity and effectiveness through the simulations.

• Proceedings of the KIEE Conference
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• 2007.04c
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• pp.103-106
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• 2007

This paper presents single-phase SRM drive system with single-stage high power factor and low torque ripple. Single-phase SRM has simple mechanical and electrical structure, robust and high speed operation characteristic. But conventional SRM drive with diode bridge rectifier and filter capacitor has a low power factor because of short charge time of capacitor. Therefore, this paper presents a novel single-phase SRM drive with single-stage structure circuit, which can improve the power factor and reduce peak torque ripple. A novel switching topology is presented base on mathematical analysis. The novel drive method is verified by simulations and experiments.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.2
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• pp.96-105
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• 2021

Large-scale power converters consist of series or parallel module combinations. In these modular converter systems, the interleaving technique can be applied to improve capacitor reliability by reducing the ripple of the I/O current in which each module operates as a phase difference. However, when applying the interleaving technique for conventional three-level boost converters, the short-circuit period of the converter can be an obstacle. Such problem is caused by the absence of a low-level inductor of the conventional three-level boost converter. To solve this problem, a three-level boost converter with a low-level inductor is proposed and analyzed to enable interleaved operation. In the proposed circuit, the current ripple of the output capacitor depends on the neutral point connections between the modules. In this study, the ripple current is analyzed by the neutral point connections of the three-level boost converter that has a low-level inductor, and the effectiveness of the proposed circuit is proven by simulation and experiment.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.5
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• pp.371-378
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• 2015

In this paper, a different type of pulse width modulation (PWM) control scheme for a buck converter is introduced. The proposed buck converter uses PWM with frequency hopping and a low quiescent.current low dropout (LDO) voltage regulator with a power supply rejection ratio enhancer to reduce high spurs, harmonics and output voltage ripples. The low quiescent.current LDO voltage regulator is not described in this paper. A three-bit binary-to-thermometer decoder scheme and voltage ripple controller (VRC) is implemented to achieve low voltage ripple less than 3mV to increase the efficiency of the buck converter. An internal clock that is synchronized to the internal switching frequency is used to set the hopping rate. A center frequency of 2.5MHz was chosen because of the bluetooth low energy (BLE) application. This proposed DC-DC buck converter is available for low-current noise-sensitive loads such as BLE and radio frequency loads in portable communications devices. Thus, a high-efficiency and low-voltage ripple is required. This results in a less than 2% drop in the regulator's efficiency, and a less than 3mV voltage ripple, with -26 dBm peak spur reduction operating in the buck converter.

• Journal of Power Electronics
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• v.19 no.4
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• pp.881-893
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• 2019

This paper proposes a practical sliding-mode controller design for shaping the impedances of cascaded boost-converter power decoupling circuits for reducing the second order harmonic ripple in photovoltaic (PV) current. The cascaded double-boost converter, when used as power decoupling circuit, has some advantages in terms of a high step-up voltage-ratio, a small number of switches and a better efficiency when compared to conventional topologies. From these features, it can be seen that this topology is suitable for residential (PV) rooftop systems. However, a robust controller design capable of rejecting double frequency inverter ripple from passing to the (PV) source is a challenge. The design constraints are related to the principle of the impedance-shaping technique to maximize the output impedance of the input-side boost converter, to block the double frequency PV current ripple component, and to prevent it from passing to the source without degrading the system dynamic responses. The design has a small recovery time in the presence of transients with a low overshoot or undershoot. Moreover, the proposed controller ensures that the ripple component swings freely within a voltage-gap between the (PV) and the DC-link voltages by the small capacitance of the auxiliary DC-link for electrolytic-capacitor elimination. The second boost controls the main DC-link voltage tightly within a satisfactory ripple range. The inverter controller performs maximum power point tracking (MPPT) for the input voltage source using ripple correlation control (RCC). The robustness of the proposed control was verified by varying system parameters under different load conditions. Finally, the proposed controller was verified by simulation and experimental results.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.6
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• pp.1003-1011
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• 2008

In this paper, optimal design of interleaved boost converters is studied in order to design low ripple, size, loss and high performance converters for fuel cell applications. Also, the process of optimal design of interleaved boost converter has been performed. Input current ripple, output voltage ripple, losses and capacity of electrical components are theoretically analyzed and informative simulation and experimental results are provided.

• Proceedings of the KIPE Conference
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• 2003.07a
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• pp.102-105
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• 2003

The leakage inductance of the High frequency Transformer(HFT) in the flyback topology can be used an inductor of the Low Pass Filter(LPF) to reduce ripple and ripple noise in the output voltage. But, the values of leakage inductance and magnetizing inductance in the HFT are within $\pm20[{\%}]$). And the operating temperature of the HFT increased by the leakage inductance. Therefore, the leakage inductance of the HFT in the flyback topology has minimum and the LPF has non-polarity ceramic capacitor in the output stage. In this paper, the LPF in the flyback topoBogy takes PCB capacitor using double layer of PCB without non-polarity ceramic capacitor. Its experimental results show the reduced ripple noise and the reduced ripple in the output stage.