• Title/Summary/Keyword: Low power testing

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Low Power Test for SoC(System-On-Chip)

  • Jung, Jun-Mo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.10a
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    • pp.892-895
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    • 2011
  • Power consumption during testing System-On-Chip (SOC) are becoming increasingly important as the IP core increases in SOC. We present a new algorithm to reduce the scan-in power using the modified scan latch reordering and clock gating. We apply scan latch reordering technique for minimizing the hamming distance in scan vectors. Also, during scan latch reordering, the don't care inputs in scan vectors are assigned for low power. Also, we apply the clock gated scan cells. Experimental results for ISCAS 89 benchmark circuits show that reduced low power scan testing can be achieved in all cases.

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The construction of 3-phase 90 MVA short-time withstand current testing facilities (3상 90 MVA 단시간전류시험 설비 구축)

  • Suh, Yoon-Taek;Kim, Yong-Sik;Yun, Hak-Dong;Kim, Maeng-Hyun
    • Proceedings of the KIEE Conference
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    • 2005.07a
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    • pp.700-702
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    • 2005
  • The most electrical apparatus should be able to withstand short-time current and peak current during a specified short time until circuit breakers have interrupted fault current. It defines the short-time withstand ability of electric a apparatus to be remain for a time interval under high fault current conditions. It is specified by both dynamic ability and thermal capability. KERI(Korea Electrotechlology Research Institute) recently constructed the new short-time current and low voltage short circuit testing facilities. This paper shows short- circuit calculation of transformer and describes high current measuring system, and evaluate the result of short-time withstand test used in $3{\phi}$ 90MVA short-time current testing facilities.

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Development of Automatic Ultrasonic Testing Techniques of Low Pressure Turbine Blade of Nuclear Power Plants (원자력 발전소 저압 터빈 동익 자동 초음파 검사 기술 개발)

  • Yang, Seung-Han;Lee, Jeong-Bin;Kim, Young-Ho;Yoon, Byung-Sik;Kim, Yong-Sik
    • Journal of the Korean Society for Nondestructive Testing
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    • v.24 no.4
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    • pp.371-377
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    • 2004
  • As the turbine running duration in nuclear power plants increases, cracks have been found in the pin finger type blade root area. The nondestructive examination for the blade root area has been carried out by manual ultrasonic examination during the overhaul period, but because of necessity to improve the reliability, we developed an automatic ultrasonic examination system and technique. To demonstrate the performance of the developed automatic ultrasonic examination system, low pressure turbine blades in the 2nd and 3rd stages of nuclear power plants were examined using the developed system. Its applicability nuclear power plant turbine roots of various types was also confirmed.

Surge Immunity Performance Enhancement Techniques on Battery Management System (전지관리장치(BMS)의 서지내성 성능향상 기법)

  • Kim, Young-Sung;Rim, Seong-Jeong;Seo, Woohyun;Jung, Jeong-Il
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.64 no.1
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    • pp.196-200
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    • 2015
  • The switching noise in the power electronics of the power conversion equipment (Power Conditioning System) for large energy storage devices are generated. Since the burst-level transient noise from being generated in the power system at a higher power change process influences the control circuit of the low voltage driver circuit. Noise may cause the malfunction of the control device even if no dielectric breakdown leads to a control circuit. To overcome this, this paper proposes the installation of an additional nano-surge protection device on the power supply DC output circuit of the battery management unit.

A Design of Power Circuit and LCL Filter for Switching Mode PV Simulator (스위칭방식 PV Simulator의 전력회로와 LCL필터 설계)

  • Lee, Sung-Min;Yu, Tae-Sik;Kim, Hyo-Sung
    • The Transactions of the Korean Institute of Power Electronics
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    • v.17 no.5
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    • pp.431-437
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    • 2012
  • PV simulators are essential equipment for testing power conditioning systems (PCS) which are one of an important part in PV generator systems, for testing before shipment. High dynamic PV simulator is required since MPPT(Maximum Power Point Tracking) test procedure has been established by EN50530 regulation recently. Most high quality PV simulator prevailed in the market is linear type which however has low efficiency. This paper proposes design guide lines for the power stage and LCL type filter cooperating with a switching mode PV simulator that shows high efficiency and very low power consumption. Proposed theory is verified by experiment.

A Study on the Low Cost Testing System Development of the Low Speed and High Torque Harsh Reducer (저속 고토크 가혹감속기의 저비용 테스트 시스템 개발에 관한 연구)

  • Park, Taehyun
    • Journal of the Korean Society of Industry Convergence
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    • v.25 no.3
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    • pp.379-386
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    • 2022
  • The goal of this research is to verify a performance test system for a low speed, high torque, and harsh reducer at low cost. The reducer rotates a cooling fan with a diameter of 10 meters, in a high temperature (50℃) cooling tower in a geothermal power plant. It requires about 500 kgf·m torque and 47.75 kW power to rotate the fan at a maximum power condition. An expensive dynamometer is commonly used for performance test of a motor or a reducer. In this paper, a low cost system is developed using a hydraulic pump as a load unit to generate torque instead of a dynamometer. We accurately calculated the required power, the flow meter, and the pressure of the pump, and selected to design and optimize the system at minimal cost. The system also applied another reverse reducer and a gearbox to increase the rotational speed and to reduce the torque from the low speed and high torque target reducer. This allows low-cost systems to be built using inexpensive components. The developed system was able to successfully measure the high torque and the low rotational speed of the target reducer at high temperature.

A Study on the Flaw Evaluation in the Straddle Mount Type Low Pressure Turbine Disc Using Phased Array Ultrasonic Technique (위상 배열 초음파 기법을 이용한 Straddle Mount형 저압 터빈 디스크 결함 평가에 관한 연구)

  • Yang, Seung-Han;Yoon, Byung-Sik;Kim, Yong-Sik
    • Journal of the Korean Society for Nondestructive Testing
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    • v.26 no.4
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    • pp.231-238
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    • 2006
  • Nondestructive examination for low pressure turbine disc in standard nuclear power plant using phased array technique was studied. For this purpose, disc mockups were made and notches were machined in the mockups. Detection and length sizing by different methods are compared. Depth of deep notches could be measured by using AATT(absolute arrival time technique) or RATT(relative arrival time technique) but shallow notches that must be detected in early stage couldn't be measured by these two methods. For this case, notch depth was estimated by using signal response angle range and preyed usefulness.

Development of Phased Array Ultrasonic Testing Technique for Nuclear Power Plant Cast Piping Weld (원자력발전소 주조 배관 용접부 위상배열 초음파검사 기술 개발)

  • Yoon, Byungsik;Yang, Seunghan;Kim, Yongsik
    • Transactions of the Korean Society of Pressure Vessels and Piping
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    • v.6 no.1
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    • pp.16-22
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    • 2010
  • Cast austenitic stainless steel(CASS) is used in the primary cooling piping system of nuclear power plant for it's relative low cost, corrosion resistance and easy of welding. However, the coarse-grain structure of cast austenitic stainless steel can strongly affect the inspectability of ultrasonic testing. The major problems encountered during inspection are beam skewing, high attenuation and high background noise of CASS component. So far, the best inspection performance involving CASS components have been achieved using low frequency TRL(Transmitter/Receiver side-by-side L wave) angle beam probe. But TRL technique could not detect shallow defect and it contains an uncertainty for sizing capability. Currently, most of researchers are studying to overcome these challenge issue. In this study, low-frequency phased array TRL technique used to detect and sizing the flaws in CF8A cast austenitic stainless steel.As conclusion, we could detect and size not only axial flaw but also circumferential flaw using low frequency phased array technique.

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Development of Measurement and Performance Testing System for Heat Pump water Heater (히트펌프 온수기 개발을 위한 계측 및 성능평가시스템 구축)

  • Kwon, Seong-Chul;Yang, Seung-Kwon
    • Proceedings of the KIEE Conference
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    • 2004.07d
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    • pp.2310-2312
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    • 2004
  • In Korea Electric Power Corporation (or KEPCO), several Demand-Side Management (or DSM) program have been carried out to effectively meet electric power demand at least costs by modifying customers electricity use patterns. As one of them, KEPCO applies low-priced night thermal-storage power service for heat appliances to facilitate efficient use of power facilities by shifting relatively high daytime demands to night hours to build loads during the off-peak periods. In the market of heat-storage type water-heater, electric water-heater has been mostly used, but it has low energy efficiency and needs high capacity electric equipments. So in order to replace these electric water heaters, 15 HP air-source heat pump water heater is developed in Korea Electric Research Institute (or KEPRI). This paper shows that measurement system for performance testing of heat pump water heater is established and heating capacity and performance is analyzed and measured for out-door environmental change.

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A New Scan Partition Scheme for Low-Power Embedded Systems

  • Kim, Hong-Sik;Kim, Cheong-Ghil;Kang, Sung-Ho
    • ETRI Journal
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    • v.30 no.3
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    • pp.412-420
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    • 2008
  • A new scan partition architecture to reduce both the average and peak power dissipation during scan testing is proposed for low-power embedded systems. In scan-based testing, due to the extremely high switching activity during the scan shift operation, the power consumption increases considerably. In addition, the reduced correlation between consecutive test patterns may increase the power consumed during the capture cycle. In the proposed architecture, only a subset of scan cells is loaded with test stimulus and captured with test responses by freezing the remaining scan cells according to the spectrum of unspecified bits in the test cubes. To optimize the proposed process, a novel graph-based heuristic to partition the scan chain into several segments and a technique to increase the number of don't cares in the given test set have been developed. Experimental results on large ISCAS89 benchmark circuits show that the proposed technique, compared to the traditional full scan scheme, can reduce both the average switching activities and the average peak switching activities by 92.37% and 41.21%, respectively.

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