• 산업경영시스템학회지
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• 제42권2호
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• pp.1-8
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• 2019

Network externalities are essentially dynamic in that the value consumers feel about a product is affected by the size of the existing customer base that uses that product. However, existing studies on network externalities analyzed the effects of network externalities in a static way, not dynamic. In this study, unlike previous studies, the impact of network externalities on price competition in a vertically differentiated market is dynamically analyzed. To this end, a two-period duopoly game model was used to reflect the dynamic aspects of network externalities. Based on the game model, the Nash equilibria for price, sales volume, and revenue were derived and numerically analyzed. The results can be summarized as follows. First, if high-end product has strong market power, the high-end product vendor takes almost all benefits of the network externality. Second, when high-end product has strong market power, the low-end product will take over most of the initial sales volume increase. Third, when market power of high-end product is not strong, it can be seen that the effects of network externalities on the high and low-end products are generally proportional to the difference in quality. Lastly, if there exists a strong network externality, it is shown that the presence of low-end product can be more profitable for high-end product vendor. In other words, high-end product vendor has incentive to disclose some technologies for the market entrance of low-end product, even if it has exclusive rights to the technologies. In that case, however, it is shown that the difference in quality should be maintained significantly.

• JSTS:Journal of Semiconductor Technology and Science
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• 제17권3호
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• pp.473-482
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• 2017

Hand gesture recognition is regarded as new Human Computer Interaction (HCI) technologies for the next generation of mobile devices. Previous hand gesture implementation requires a large memory and computation power for hand segmentation, which fails to give real-time interaction with mobile devices to users. Therefore, in this paper, we presents a low latency and memory-efficient hand segmentation architecture for natural hand gesture recognition. To obtain both high memory-efficiency and low latency, we propose a streaming hand contour tracing unit and a fast contour filling unit. As a result, it achieves 7.14 ms latency with only 34.8 KB on-chip memory, which are 1.65 times less latency and 1.68 times less on-chip memory, respectively, compare to the best-in-class.

• ETRI Journal
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• 제44권6호
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• pp.885-902
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• 2022

The mmWave cell-free massive MIMO (CFmMIMO), combining the advantages of wide bandwidth in the mmWave frequency band and the high- and uniform-spectral efficiency of CFmMIMO, has recently emerged as one of the enabling technologies for 6G. In this paper, we propose a novel framework for energy-efficient mmWave CFmMIMO systems that uses low-resolution digital-analog converters (DACs) and phase shifters (PSs) to introduce lowcomplexity hybrid precoding. Additionally, we propose a heuristic pilot allocation scheme that makes the best effort to slash some interference from copilot users. The simulation results show that the proposed hybrid precoding and pilot allocation scheme outperforms the existing schemes. Furthermore, we reveal the relationship between the energy and spectral efficiencies for the proposed mmWave CFmMIMO system by modeling the whole network power consumption and observe that the introduction of low-resolution DACs and PSs is effective in increasing the energy efficiency by compromising the spectral efficiency and the network power consumption.

• 한국인터넷방송통신학회논문지
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• 제17권2호
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• pp.1-6
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• 2017

최근 사물인터넷의 급부상으로 배터리 기반 사물인터넷 기기를 위한 전력절감 기술이 주목받고 있다. 사물인터넷 기기는 일종으로 실시간시스템으로, 전력절감을 위해 프로세서의 전압을 동적으로 조절하는 방법이 각광받아왔으나, 최근 연구에 따르면 전력소모 중 메모리가 차지하는 비중이 급격히 증가한 것으로 분석되고 있다. 이에 본 논문은 프로세서의 전압조절 기법에 저전력 비휘발성메모리 기술을 결합하여 실시간시스템의 전력소모를 더욱 줄이고자 한다. 이는 낮은 전압의 프로세서로 태스크의 스케줄링이 가능한 시점에는 메모리의 성능이 낮아지더라도 여전히 스케줄링이 가능성할 것이라는 점에 착안한 것이다. 본 논문은 이기종메모리 상의 태스크 할당 문제를 프로세서의 전압조절 기법과 결합한 후 두 기법의 전력절감 효과를 분석하고, 이들을 결합하여 전력절감을 극대화한다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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• pp.609-613
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• 2005

Advanced mobile communication devices require a bright, high information content display in a small, light-weight, low power consumption package. In this paper we will outline our progress towards developing such a low power consumption active-matrix flexible OLED ($FOLED^{TM}$) display. Our work in this area is focused on three critical enabling technologies. The first is the development of a high efficiency long-lived phosphorescent OLED ($PHOLED{TM}$) device technology, which has now proven itself to be capable of meeting the low power consumption performance requirements for mobile display applications. Secondly, is the development of flexible active matrix backplanes, and for this our team are employing poly-Si TFTs formed on metal foil substrates as this approach represents an attractive alternative to fabricating poly-Si TFTs on plastic for the realization of first generation flexible active matrix OLED displays. Unlike most plastics, metal foil substrates can withstand a large thermal load and do not require a moisture and oxygen permeation barrier. Thirdly, the key to reliable operation is to ensure that the organic materials are fully encapsulated in a package designed for repetitive flexing. We also present progress in operational lifetime of encapsulated T-PHOLED pixels on planarized metal foil and discuss PHOLED encapsulation strategy.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.1081-1085
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• 2009

We have already developed EMI reducing techniques using lossless compression by vertically differential EMI suppression method (VDE[1]). It applies lossless modulo reduction and data bit mapping optimization for low voltage differential signaling (LVDS) transmission lines, that reduces the probability of transient bit and EMI by 12 dB [6][7]. We also improved and optimized the VDE for low power LCD interface. With this modified VDE algorithm[8], the developed FPGA was measured the reduction of the power consumption of LCD circuit by more than 15 % compared to the conventional methods in the case of 14-in LCD with SXGA resolution. The VDE algorithm is based on the total image systematic approach. In the VDE method, the present image signals are subtracted for the 1H delayed image signals and transferred to a column driver through a PCB. As the vertical correlations for image signals are very high, we expected that most of the vertically subtracted image signals remain 0 level and transient cycles become very long. As a result, the power consumption and EMI are extremely reduced for the transferred image signals on a PCB. In this paper, we discussed our proposed method by emphasizing the fact that systematic approach are important based on not only display point of view but also total system point of view.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 전력전자학술대회
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• pp.519-521
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• 2018

For most of application, total system cost is first priority to Engineer. Approach for making system cost down can be to reduce cooling cost by selecting low loss item or reducing filter cost by increasing frequency. SiC Mosfet ($CoolSiC^{TM}$) can approach both of case. This paper shows market-needs and reviews each application with SiC.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2017년도 전력전자학술대회
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• pp.596-597
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• 2017

For General Purpose Inverter dedicated in Motor drive, this market is blood market due to low market price. So, developing engineer must consider the cost reduction plan and do action. This inverter always needs to measure current and shunt solution can be one of cost reduction solution.

• 대한전자공학회논문지SD
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• 제41권10호
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• pp.95-104
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• 2004

본 논문에서는 0.13㎛ 이하의 deep sub-micron 공정처럼 누설 전류가 심한 공정을 이용하여 멀티미디어 SoC를 설계할 때, 가장 전력 소모가 높은 움직임 추정 기법의 전력 소모를 줄이기 위한 저전력 움직임 추정기의 아키텍쳐를 제안하였다. 제안하는 아키텍쳐는 기존의 동적 전력 소모만을 고려한 구조와는 달리 정적 전력 소모까지 고려하여 누설 전류가 심한 공정에 적합한 구조로, 효율적인 전력 관리가 필수적인 동영상 전화기 등의 각종 휴대용 정보기기 단말기에 적합한 형태이다. 제안하는 아키텍쳐는 하드웨어 구현이 용이한 전역 탐색 기법 (full search)을 기본으로 하며 동적 전력 소모를 줄이기 위하여 조기 은퇴(early break-off) 기법을 도입하였다. 또한 정적 전력 소모를 줄이기 위하여 전원선 잡음을 고려한 메가블록 전원 차단 기법을 사용하였다. 제안된 아키텍쳐를 멀티미디어 SoC에 적용하였을 때의 효용성을 검증하기 위해 시스템 수준의 제어 흐름과 저전력 제어 기법을 개발하였으며, 이를 바탕으로 시스템 수준에서의 소모 전력을 계산하였다. 모의실험 결과 0.13㎛ 공정에서 전력 소모가 50% 정도로 감소함을 확인할 수 있었다. 선폭의 감소와 칩 내부 발열량의 증가로 인한 누설 전류의 증가를 고려할 때, 기존의 동적 전력 소모만을 고려한 구조는 전력 감소 효율이 점점 나빠짐에 반하여 제안하는 움직임 추정기 아키텍쳐는 안정적인 전력 감소 효율을 보여주었다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제6권3호
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• pp.136-145
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• 2006

Two major processing technologies of GaAs HBT and pHEMT have been released in production at Win Semiconductors corp. to address the strong demands of power amplifiers and switches for both handset and WLAN communications markets. Excellent performance with low processing cost and die shrinkage features is reported from the manufactured MMICs. With the stringent tighter manufacturing quality control WIN has successfully become one of the major pure open foundry house to serve the communication industries. The advancing of both technologies to include E/D-pHEMTs and BiHEMTs likes for multifunctional integration of PA, LNA, switch and logics is also highlighted.