• Title/Summary/Keyword: Low level platform

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KAUSAT-5 Development and Verification based on 3U Cubesat Standard Platform (3U 큐브위성 표준 플랫폼에 기반한 한누리 5호 개발 및 검증)

  • Song, Sua;Lee, Soo-Yeon;Kim, Hong-Rae;Chang, Young-Keun
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.45 no.8
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    • pp.686-696
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    • 2017
  • The major objective of this study is to develop and verify the KAUSAT-5 based on the modular 3U CubeSat standard platform. In the mechanical system design of a 3U standard platform, subsystem and micro equipment functions/performance should be integrated and miniaturized on micro-sized PCBs and electrical capability was maximized to accommodate multiple payloads. KAUSAT-5 is 3U-sized Cubesat which will be operated in Low Earth Orbit(LEO), which implements mainly two scientific missions; one is to observe the Earth through infrared camera and the other is to measure space radiation with a Geiger Muller tube. An additional mission is to verify the equipment(device) such as VSCMG and fuzzy logic-based MPPT internally developed. The results of ETB, qualification and acceptance level environmental tests were shown to verify standard platform and KAUSAT-5 Cubesat.

Experimental Verification of Obstacle Avoidance Algorithm ELA Applicable to Rescue Robots (구조로봇에 적합한 장애물 회피 알고리즘 ELA의 실험적 검증)

  • Jeong, Hae-Kwan;Hyun, Kyung-Hak;Kim, Soo-Hyun;Kwak, Yoon-Keun
    • The Journal of Korea Robotics Society
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    • v.4 no.2
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    • pp.105-111
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    • 2009
  • In this paper, we provide experimental results and verification for obstacle avoidance algorithm 'ELA(Emergency Level Around)', which is applicable to rescue robots. ELA is a low level intelligence-based obstacle avoidance algorithm, so can be used in fast mobile robots requiringhigh speed in operation with little computational load. Constructed system for experiments consist of laptop, sensors, peripheral devices and mobile robot platform VSTR(Variable Single-tracked Robot) to realize predetermined scenarios. Finally, experiment was conducted in indoor surroundings including miscellaneous things as well as dark environment to show fitness and robustness of ELA for rescue, and it is shown that VSTR navigates endowed area well with real-time obstacle avoidance based on ELA. Therefore, it is concluded that ELA can be a candidate algorithm to increase mobility of rescue robots in real situation.

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Rack-Level DC Power Solution for Volume Servers

  • Kwon, Won-Ok;Seo, Hae-Moon;Choi, Pyung
    • ETRI Journal
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    • v.32 no.6
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    • pp.940-949
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    • 2010
  • Rack-level DC power supply is the optimal technology for providing DC power to a volume server without any power infrastructure changes in an existing AC data center. In this paper, we propose a smartly controllable and monitorable DC rack power system. The proposed system improves power efficiency by changing the power distribution architecture of a conventional method in the rack. We developed an optimal power control method in multipower modules to provide high efficiency at low loads. In addition, the proposed system provides real-time web monitoring of the rack power and environment around a rack. In our experiments, the proposed system improved the power efficiency by over 10% compared to an AC power system providing N+1 redundant power and power monitoring.

A Tool to Support Efficient Development of Node Software for Various Operating System Platforms in Sensor Network Environment (센서 네트워크 환경에서 다양한 운영체제 플랫폼을 위한 노드 소프트웨어의 효율적인 개발을 지원하는 도구)

  • Lee, Woo-Jin;Choi, Il-Woo
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.7
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    • pp.4536-4544
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    • 2014
  • This paper proposes a development tool to efficiently develop node software for various operating system platforms in a sensor network. The proposed tool consisted of several modules, such as writing graphical model diagram, PIM and PSM design, code generation, and deployment file generation. Through the proposed tool, the users can graphically draw a sensor network model and design the PIM and PSM of the node software by setting the values of the predefined attributes. The source code of the node software is generated automatically from the PSM using the code templates of the target platform. The deployment files for installing node software on each node are generated automatically. The proposed tool helps the users to develop node software easily for a range of target platforms, even though they do not have details of the low-level information for a sensor network.

Characteristic of room acoustical parameters with source-receiver distance on platform in subway stations (지하철 승강장의 음원-수음점 거리에 따른 실내음향 평가지수 특성)

  • Kim, Suhong;Song, Eunsung;Kim, Jeonghoon;Lee, Songmi;Ryu, Jongkwan
    • The Journal of the Acoustical Society of Korea
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    • v.40 no.6
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    • pp.615-625
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    • 2021
  • Prior to proposing appropriate standard for subway station platform, this study conducted field measurements to examine characteristics of room acoustics on platform of two subway stations. As a result of analyzing the longitudinal length of the platform, Sound Pressure Level (SPL) decreased (maximum difference : 14 dB), Reverberation Time (RT) tended to increase (maximum difference of 0.8 s ~ 1.5 s), and C50 and D50 were decreased (maximum difference: 5.9 dB ~ 9.1 dB and 31.8 % ~ 37.6 %, respectively) as measurement positions moved away from the sound source. The Interaural Cross-correlation Coefficient (IACC) did not show clear tendency, but it was lower than 0.3 in entire points. It is judged that the subway platform has non-uniform sound field characteristics due to various combinations of direct and reflective sound even though it is finished with a strong reflective material.This indicates that the room acoustic characteristics of the near and far sound field are clearly expressed depending on the source-receiver distances in the subway platform having a long flat shape with a low height compared to the length.Therefore, detailed architectural and electric acoustic design based on the characteristics of each location of speaker and sound receiver in the platform is required for an acoustic design with clear sound information at all positions of the platform.

FPGA Modem Platform Design for eHSPA and Its Regularized Verification Methodology (eHSPA 규격을 만족하는 FPGA모뎀 플랫폼 설계 및 검증기법)

  • Kwon, Hyun-Il;Kim, Kyung-Ho;Lee, Chung-Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.2
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    • pp.24-30
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    • 2009
  • In this paper, the FPGA modem platform complying with 3GPP Release 7 eHSPA specifications and its regularized verification flow are proposed. The FFGA platform consists of modem board supporting physical layer requirements, MCU and DSP core embedded control board to drive the modem board, and peripheral boards for RF interfacing and various equipment interfaces. On the other hand, the proposed verification flow has been regularized into three categories according to the correlation degrees of hardware-software inter-operation, such as simple function test, scenario test call processing and system-level performance test. When it comes to real implementations, the emulation verification strategy for low power mobile SoC is also introduced.

Low-Complexity Deeply Embedded CPU and SoC Implementation (낮은 복잡도의 Deeply Embedded 중앙처리장치 및 시스템온칩 구현)

  • Park, Chester Sungchung;Park, Sungkyung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.3
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    • pp.699-707
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    • 2016
  • This paper proposes a low-complexity central processing unit (CPU) that is suitable for deeply embedded systems, including Internet of things (IoT) applications. The core features a 16-bit instruction set architecture (ISA) that leads to high code density, as well as a multicycle architecture with a counter-based control unit and adder sharing that lead to a small hardware area. A co-processor, instruction cache, AMBA bus, internal SRAM, external memory, on-chip debugger (OCD), and peripheral I/Os are placed around the core to make a system-on-a-chip (SoC) platform. This platform is based on a modified Harvard architecture to facilitate memory access by reducing the number of access clock cycles. The SoC platform and CPU were simulated and verified at the C and the assembly levels, and FPGA prototyping with integrated logic analysis was carried out. The CPU was synthesized at the ASIC front-end gate netlist level using a $0.18{\mu}m$ digital CMOS technology with 1.8V supply, resulting in a gate count of merely 7700 at a 50MHz clock speed. The SoC platform was embedded in an FPGA on a miniature board and applied to deeply embedded IoT applications.

Mobile Payment Use in Light of Privacy Protection and Provider's Market Control

  • Mohammad Bakhsh;Hyein Jeong;Lingyu Zhao;One-Ki Daniel Lee
    • Asia pacific journal of information systems
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    • v.31 no.3
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    • pp.257-276
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    • 2021
  • This study investigates the factors that facilitate or hinder people to use mobile payment, especially drawing upon the theoretical perspectives on individual's privacy protection motivation and perceived market condition. Survey data (n = 200) were collected through a web-based platform and used to test a theoretical model. The results show that one's privacy protection power is formed by various individual and technological factors (i.e., perceived data exposure, self-efficacy, and response efficacy), and in turn it determines his/her intention to use mobile payment. Moreover, the relationship between privacy protection power and mobile payment use is conditional on the perceived market control by the service provider - with a perception of the high level of provider's market control, one uses mobile payment regardless of his/her privacy protection power, while under the low level of provider's market control, the decision depends on the degree of privacy protection power. The findings would help our understanding of why some people are more susceptible to mobile payment and others are not.

The effects of Padlet use on writing anxiety and strategy use in online English writing learning (온라인 영어쓰기학습에서 Padlet 활용이 쓰기 불안과 전략에 미치는 영향)

  • Im, Hee-Joo;Lee, Young Lim
    • Journal of Digital Convergence
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    • v.20 no.5
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    • pp.69-75
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    • 2022
  • This study aims to examine how the use of Padlet, an online platform, affects students' English writing anxiety and English writing strategy in online college English writing classes. A total of 64 college students participated in the study and completed the survey including English writing anxiety, English writing strategy and demographic information. For the study, we divided participants into 2 groups, experimental group using Padlet for their writing tasks and control group using college e-learning during a semester. The results showed that students using Padlet used more writing strategies than the students using college e-learning platform. The use of Padlet, however, was not statistically significant on writing anxiety. English writing anxiety was differed by English level, but decreased at the end of semester regardless of English level. The results imply that Padlet is a useful online learning tool for English learners to actively use English writing strategies and even for learners with low English writing proficiency.

Design and Evaluation of the Internet-Of-Small-Things Prototype Powered by a Solar Panel Integrated with a Supercapacitor

  • Park, Sangsoo
    • Journal of the Korea Society of Computer and Information
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    • v.26 no.11
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    • pp.11-19
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    • 2021
  • In this paper, we propose a prototype platform combined with the power management system using, as an auxiliary power storage device, a supercapacitor that can be fast charged and discharged with high power efficiency as well as semi-permanent charge and discharge cycle life. For the proposed platform, we designed a technique which is capable of detecting the state of power cutoff or resumption of power supplied from the solar panel in accordance with physical environment changes through an interrupt attached to the micro-controller was developed. To prevent data loss in a computing environment in which continuous power supply is not guaranteed, we implemented a low-level system software in the micro-controller to transfer program context and data in volatile memory to nonvolatile memory when power supply is cut off. Experimental results shows that supercapacitors effectively supply temporary power as auxiliary power storage devices. Various benchmarks also confirm that power state detection and transfer of program context and data from volatile memory to nonvolatile memory have low overhead.