• Proceedings of the KIPE Conference
• /
• 2008.06a
• /
• pp.505-507
• /
• 2008

A conventional active-clamp forward (ACF) converter is a favorable candidate in low-to-medium power applications. However, the switches suffer from high voltage stress, i.e., sum of the input voltage and the reset capacitor voltage. Therefore, it is not suitable for high input voltage applications such as a front-end converter of which the input voltage is about 400-$V_{dc}$. To solve this problem, three-switch ACF (TS-ACF) converter, which employs two main switches and one auxiliary switch with low voltage stress, is proposed. Utilizing low-voltage rated switches, the proposed converter is promising for high input voltage applications with high efficiency and low cost.

• Journal of Power Electronics
• /
• v.7 no.4
• /
• pp.278-285
• /
• 2007

Recently, plasma display panels (PDP) have become the most promising candidate in the market for large screen size flat panel displays. PDPs have many merits such as a fast display response time and wide viewing angle. However, there are still concerns about high cost because they require complex driving circuits composed of high power switching devices to generate various voltage waveforms for three operational modes of reset, scan, and sustain. Conventional PDP driving circuits use path switches for voltage separation and a scan switch to offer a scan voltage for reset and scan operations, respectively. In addition, there exist reset switches to initialize PDPs by regulating the wall charge conditions with ramp shaped pulses, which means the necessity of specific power devices for the reset operation. Because power for the plasma discharge accompanied by a large current is transferred to a panel via path switches, high power rating switches are used for path switches. Therefore, this paper proposes a novel low-cost PDP driving scheme achieved by not only eliminating path switches but also merging the function of reset switches into other switches used for sustain or scan operations. The simulated voltage waveforms of the proposed topology and experimental results implemented in a 42-inch panel to demonstrate the validity of using a new gate driver that merges the functions of power switches are presented.

• Proceedings of the KIEE Conference
• /
• 2002.07c
• /
• pp.1969-1971
• /
• 2002

This paper presents the design and performance of low pull-in voltage MEMS switches for commercial cellular/PCS applications. The switches have all-metal (3 ${\mu}m$ thick Au) movable plates over CPW(Coplanar Waveguide) transmission line. The stress gradient in a movable plate is considered in mechanical design to obtain an accurate pull-in voltage. Series metal-to-metal contact switches are fabricated and evaluated. Those switches exhibit the low loss(<0.2 dB @1.9 GHz) with good isolation(55 dB @1.9 GHz).

• Smart Structures and Systems
• /
• v.26 no.4
• /
• pp.521-531
• /
• 2020

In this paper, a new interleaved high step-up converter with low voltage stress on the switches is proposed. In the proposed converter, soft switching is provided for all switches by just one auxiliary switch, which decreases the conduction loss of auxiliary circuit. Also, the auxiliary circuit is expanded on the converter with more input branches. In the converter all main switches operate under zero voltage switching condition and auxiliary switch operate under zero current switching condition. Because of the interleaved structure, the reliability of converter increases and input current ripples decreases. The clamp capacitor in the converter not only absorb the voltage spikes across the switch due to leakage inductance, but also improve voltage gain. The proposed converter is fully analyzed and to verify the theoretical analysis, a 100 W prototype was implemented. Also, to show the effectiveness of auxiliary circuit on conduction EMI, EMI of the proposed converter comprised with hard switching counterpart.

• Journal of Electrical Engineering and Technology
• /
• v.8 no.6
• /
• pp.1328-1336
• /
• 2013

Nowadays multilevel inverters are developing generally due to reduced voltage stress on power switches and low total harmonic distortion (THD) in output voltage. However, for increasing the output voltage levels the number of circuit devices are increased and it results in increasing the cost of converter. In this paper, a novel multilevel inverter is proposed. The suggested topology uses less number of power switches and related gate drive circuits to generate the same level in output voltage with comparison to traditional cascaded multilevel inverter. With the proposed topology all levels in output voltage can be realized. As an illustration, a symmetric 13-level and asymmetric 29-level proposed inverters have been simulated and implemented. The total peak inverse (PIV) and power losses of presented inverter are calculated and compared with conventional cascaded multilevel inverter. The presented analyses show that the power losses in the suggested multilevel inverter are less than the traditional inverters. Presented simulation and experimental results demonstrate the feasibility and applicability of the proposed inverter to obtain the maximum number of levels with less number of switches.

• Proceedings of the KIPE Conference
• /
• 2016.07a
• /
• pp.107-108
• /
• 2016

Solid State Transformer(SST) has been recently regarded as a good alternative to conventional low frequency transformer. SST is consist of several high voltage power stage, so it is important to select optimal semiconductor switches for specification. This paper presents optimal IGBT switches for low switching losses using analyzing switching characteristics of several high voltage IGBT switches. Double Pulse Tester(DPT) experiment is used to verify characteristics of this IGBT switches.

• Proceedings of the KIPE Conference
• /
• 1998.10a
• /
• pp.79-84
• /
• 1998

A novel zero voltage and zero current switching (ZVZCS) full bridge (FB) PWM converter with low output current ripple is presented. A simple auxiliary circuit added in the secondary provides ZVZCS conditions to primary switches, ZVS for leading-leg switches and ZCS for lagging-leg switches, as well as reduces the output current ripple (ideally zero ripple). The auxiliary circuit includes neither lossy components nor additional active switches which are demerits of the previously presented ZVZCS converters. Many advantages including simple circuit topology, high efficiency, low cost and low current ripple make the new converter attractive for high performance high power (＞1kW) applications. The principle of operation, features and design considerations are illustrated and verified on a 2.5kW, 100KHz IGBT based experimental circuit.

• Transactions on Electrical and Electronic Materials
• /
• v.16 no.4
• /
• pp.173-178
• /
• 2015

In lieu of the excellent radio frequency (RF) performance of microelectromechanical system ( MEMS) switches, these micro switches need higher actuation voltage for their operation. This requirement is secondary to concerns over the swtiches’ reliability. This paper reports high reliability operation of RF MEMS switches with low voltage requirements. The proposed switch is optimised to perform in the Q-band, which results in actuation voltage of just 16.4 V. The mechanical stress gradient in the thin micro membrane is computed by simulating von Mises stress in a multi-physics environment that results in 90.4 MPa stress. The computed spring constant for the membrane is 3.02 N/m. The switch results in excellent RF performance with simulated isolation of above 38 dB, insertion loss of less than 0.35 dB and return loss of above 30 dB in the Q-band.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.25 no.3
• /
• pp.157-161
• /
• 2020

High voltage gain converters are essential for distributed power generation systems with renewable energy sources, such as fuel cells and solar cells, because of their low voltage characteristics. This paper introduces a novel nonisolated DC-DC converter topology developed by combining an inverting buck-boost converter and voltage multipliers. In the proposed converter, the input voltage is connected in series with the output, and the majority of the input power is directly delivered to the load. The voltage multipliers are stacked in series to achieve high step-up voltage gain. The voltage stress across all of the switches and capacitors can be significantly reduced. As a result, the switches with low voltage ratings can be used to achieve high efficiency and low cost. To verify the validity of the proposed topology, a 360-W prototype converter is built to obtain the experimental results.

• Journal of Power Electronics
• /
• v.16 no.2
• /
• pp.498-511
• /
• 2016

This paper presents a single-phase five-level inverter controlled by two novel pulse width modulation (PWM) switching techniques. The proposed PWM techniques are designed based on minimum switching power loss and minimum total harmonic distortion (THD). In a single-phase five-level inverter employing six switches, the first proposed PWM technique requires four switches to operate at switching frequency and two other switches to operate at line frequency. The second proposed PWM technique requires only two switches to operate at switching frequency and the rest of the switches to operate at line frequency. Compared with conventional PWM techniques for single-phase five-level inverters, the proposed PWM techniques offer high efficiency and low harmonic components in the output voltage. The validity of the proposed PWM switching techniques in controlling single-phase five-level inverters to regulate load voltage is verified experimentally using a 100 V, 500 W laboratory prototype controlled by dspace 1103.