• Journal of Semiconductor Engineering
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• 제2권3호
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• pp.142-153
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• 2021

Recent research on synaptic devices has been reviewed from the perspective of hardware-based neuromorphic computing. In addition, the backgrounds of neuromorphic computing and two training methods for hardware-based neuromorphic computing are described in detail. Moreover, two types of memristor- and CMOS-based synaptic devices were compared in terms of both the required performance metrics and low-power applications. Based on a review of recent studies, additional power-scalable synaptic devices such as tunnel field-effect transistors are suggested for a plausible candidate for neuromorphic applications.

• Journal of information and communication convergence engineering
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• 제12권4호
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• pp.252-256
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• 2014

Traditional block cipher Advanced Encryption Standard (AES) is widely used in the field of network security, but it has high overhead on each operation. In the 15th international workshop on information security applications, a novel lightweight and low-power encryption algorithm named low-power encryption algorithm (LEA) was released. This algorithm has certain useful features for hardware and software implementations, that is, simple addition, rotation, exclusive-or (ARX) operations, non-Substitute-BOX architecture, and 32-bit word size. In this study, we further improve the LEA encryptions for cloud computing. The Web-based implementations include JavaScript and assembly codes. Unlike normal implementation, JavaScript does not support unsigned integer and rotation operations; therefore, we present several techniques for resolving this issue. Furthermore, the proposed method yields a speed-optimized result and shows high performance enhancements. Each implementation is tested using various Web browsers, such as Google Chrome, Internet Explorer, and Mozilla Firefox, and on various devices including personal computers and mobile devices. These results extend the use of LEA encryption to any circumstance.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2014년도 추계학술대회 논문집
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• pp.33-34
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• 2014

In this paper, the inverter switch losses of BLDC motor for three types of PWM method and power devices was analyzed. When BLDC motor is driven at low currents, inverter switch losses for MOSFET is low because MOSFET operates like resistance. But, inverter switch losses for IGBT is higher than MOSFET due to its large turn-off losses. For low power inverter with MOSFET, the power losses of unified PWM is lower than that of unipolar and bipolar PWM.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 하계종합학술대회 논문집(2)
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• pp.601-604
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• 2004

In this paper, we propose a driving circuit that can be operated with a lower voltage than that of the conventional circuit without reducing the discharge voltage. the circuit proposed in this paper has a merit to improve the electrical characteristics because it can be composed of switching devices with low voltage. The operation and efficiency using real devices. The features of the circuit proposed in this paper are as follows; the power loss can be decreased by the use of low voltage, the cost if the driving circuit for PDP can be reduced by the use of switching devices operated with low voltage.

• JSTS:Journal of Semiconductor Technology and Science
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• 제17권3호
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• pp.473-482
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• 2017

Hand gesture recognition is regarded as new Human Computer Interaction (HCI) technologies for the next generation of mobile devices. Previous hand gesture implementation requires a large memory and computation power for hand segmentation, which fails to give real-time interaction with mobile devices to users. Therefore, in this paper, we presents a low latency and memory-efficient hand segmentation architecture for natural hand gesture recognition. To obtain both high memory-efficiency and low latency, we propose a streaming hand contour tracing unit and a fast contour filling unit. As a result, it achieves 7.14 ms latency with only 34.8 KB on-chip memory, which are 1.65 times less latency and 1.68 times less on-chip memory, respectively, compare to the best-in-class.

• 전자통신동향분석
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• 제35권2호
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• pp.69-78
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• 2020

Small portable devices such as mobile phones and laptops currently display a trend of high power consumption owing to their characteristics of high speed and multifunctionality. Low-power SoC design is one of the important factors that must be considered to increase portable time at limited battery capacities. Popular low power SoC design techniques include clock gating, multi-threshold voltage, power gating, and multi-voltage design. With a decreasing semiconductor process technology size, leakage power can surpass dynamic power in total power consumption; therefore, appropriate low-power SoC design techniques must be combined to reduce power consumption to meet the power specifications. This study examines several low-power SoC design trends that reduce semiconductor SoC dynamic and static power using EDA tools. Low-power SoC design technology can be a competitive advantage, especially in the IoT and AI edge environments, where power usage is typically limited.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 B
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• pp.958-960
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• 2002

High Temperature Superconducting (HTS) devices make it possible to operate with no electrical loss by resistance. If, however, the applied current is over its critical current, the phase of HTS devices is changed to normal state, so called, quench. In this case, since resistance of HTS is increased abruptly, it can not be avoidable to damage the whole apparatus. In this study, quench detector to protect HTS devices was proposed. We designed the quench detecting circuit and tested the performance of the circuit. The detecting circuit was consisted of Op-Amp and low pass filter etc, to detect very low voltage around $1{\mu}V$. The circuit detected effectively the low voltage when over current is applied to HTS tapes. At the next step, we are going to apply and test the circuit to protect the prototype HTS cable.

• 전기학회논문지
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• 제62권8호
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• pp.1101-1107
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• 2013

A light emitting diodes(LED) lighting has been increasingly used due to its low power consumption, long life time, high efficiency, and environment friendly characteristics. Also various power converters has been applied to drive these LED lighting. Among many power converters, a LLC resonant converter could be applied for LED lighting because of its high efficiency and high power density. Furthermore, the function of power factor correction(PFC) might be added. In this paper, 1-stage asymmetrical LLC resonant converter is proposed. The proposed converter performs both input-current harmonics reduction and PFC using the discontinuous conduction mode(DCM). The proposed 1-stage LLC resonant converter approach has the lower voltage stress across switching devices and achieve the zero voltage switching(ZVS) in switching devices. To verify the performance of the proposed converter, simulation and experimental results from a 300[W] prototype are provided.

• Journal of Communications and Networks
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• 제18권6호
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• pp.926-937
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• 2016

In this paper, we study the feasibility of receiver diversity for application to downlink cellular networks, where low-energy devices are equipped with information decoding and energy harvesting receivers for simultaneous wireless information and power transfer. We compare several options that are based on selection combining and maximum ratio combining, which provide different implementation complexities. By capitalizing on the Frechet inequality, we shed light on the advantages and limitations of each scheme as a function of the transmission rate and harvested power that need to be fulfilled at the low-energy devices. Our analysis shows that no scheme outperforms the others for every system setup. It suggests, on the other hand, that the low-energy devices need to operate in an adaptive fashion, by choosing the receiver diversity scheme as a function of the imposed requirements. With the aid of stochastic geometry, we introduce mathematical frameworks for system-level analysis. We show that they constitute an important tool for system-level optimization and, in particular, for identifying the diversity scheme that optimizes wireless information and power transmission as a function of a sensible set of parameters. Monte Carlo simulations are used to validate our findings and to illustrate the trade-off that emerge in cellular networks with simultaneous wireless information and power transfer.

• 조명전기설비학회논문지
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• 제17권4호
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• pp.94-99
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• 2003

정밀하고 소형화된 전자기기 사용의 증가로 인한 전원공급의 질적 향상에 대한 필요성이 강하게 증가하고 있다. 저압전원 배전계통에서의 과도 과전압은 직격 또는 유도뢰에 의해 유도되어지고, 가정, 사무실, 공장 등의 자동화시스템이나 병원설비와 같은 중요한 시스템의 손상이나 고장의 원인이 되고 있다. 본 논문에서는 임펄스 발생기를 이용하여 배전용 변압기를 거쳐 저압 전원시스템으로 이행되는 뇌과전압의 양상에 대하여 실험적으로 조사하였다. 배전용 변압기의 1차측에 설치한 피뢰기와 수용가측 추가접지는 저압 전원시스템으로 이행되는 뇌서지전압의 제한에는 크게 기여하지 않았다.