• Title/Summary/Keyword: Low Noise Amplifier(LNA)

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A Design of Low Noise RF Front-End by Improvement Q-factor of On-Chip Spiral Inductor (On-Chip 나선형 인덕터의 품질계수 향상을 통한 저잡음 RF 전치부 설계)

  • Ko, Jae-Hyeong;Jung, Hyo-Bin;Choi, Jin-Kyu;Kim, Hyeong-Seok
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.2
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    • pp.363-368
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    • 2009
  • In the paper, we confirmed improvement Noise figure of the entire RF front-end using spiral inductor with PGS(Patterned Ground Shield) and current bleeding techniques. LNA design is to achieve simultaneous noise and input matching. Spiral inductor in input circuit of LNA inserted PGS for betterment of Q-factor. we modeling inductor using EM simulator, so compared with inductor of TSMC 0.18um. We designed and simulation the optimum structure of PGS using Taguchi's method. We confirmed enhancement of noise figure at LNA after substituted for inductor with PGS. Mixer designed using current bleeding techniques for reduced noise. We designed LNA using inductor with PGS and Mixer using current bleeding techniques, so confirmed improvement of noise figure.

A 2 GHz 20 dBm IIP3 Low-Power CMOS LNA with Modified DS Linearization Technique

  • Rastegar, Habib;Lim, Jae-Hwan;Ryu, Jee-Youl
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.4
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    • pp.443-450
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    • 2016
  • The linearization technique for low noise amplifier (LNA) has been implemented in standard $0.18-{\mu}m$ BiCMOS process. The MOS-BJT derivative superposition (MBDS) technique exploits a parallel LC tank in the emitter of bipolar transistor to reduce the second-order non-linear coefficient ($g_{m2}$) which limits the enhancement of linearity performance. Two feedback capacitances are used in parallel with the base-collector and gate-drain capacitances to adjust the phase of third-order non-linear coefficients of bipolar and MOS transistors to improve the linearity characteristics. The MBDS technique is also employed cascode configuration to further reduce the second-order nonlinear coefficient. The proposed LNA exhibits gain of 9.3 dB and noise figure (NF) of 2.3 dB at 2 GHz. The excellent IIP3 of 20 dBm and low-power power consumption of 5.14 mW at the power supply of 1 V are achieved. The input return loss ($S_{11}$) and output return loss ($S_{22}$) are kept below - 10 dB and -15 dB, respectively. The reverse isolation ($S_{12}$) is better than -50 dB.

Design of LNA and Mixer for Ku-band Receiver (Ku 밴드 수신단을 위한 저잡음 증폭기 및 주파수 혼합기 설계)

  • Choi, Hyuk-Jae;Ko, Jae-Hyeong;Kim, Koon-Tae;Lee, Je-Kwang;Kim, Hyeong-Seok
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.61 no.2
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    • pp.257-262
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    • 2012
  • The Ministry of Information-Communication assigned 18~19GHz frequency band for communication of cabins and platform to link between subway/train and it's station. In this paper, we propose wireless transmission devices which are 2 stage hybrid low noise amplifier of 18GHz band and mixer for 18GHz as well to apply for RF receiver. We designed LNA to be noise matched its 1st stage and gain matched for 2nd stage and mixer using $180^{\circ}$ hybrid coupler to suppress the spurious signal. The transistors of 18 GHz LNA and mixer are NE3210S01 of NEC and KMB-N51-1, respectively. As the result of simulation, we get 19.92dB gain and 2.06dB noise figure with LNA and 8.61dB conversion loss with mixer.

A LNA for CDMA application

  • 유정근;김윤호;김정태;허창우
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.765-768
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    • 2003
  • 본 논문에서는 Noise Figure, IP3, Gain, power dissipation들을 최대한 고려하여 간단하면서도 훌륭한 성능을 보이는 PCS용 1.9 GHz CDMA Low Noise Amplifier를 설계하였다. 비록 본 논문에서는 특정한 트랜지스터를 이용하여 설계하였지만, 다른 트랜지스터를 사용하여 이러한 방법으로 설계하여도 무관할 것이다.

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A study on the design of LNA for Ku-band LNB module (Ku-band에서의 LNB 모듈을 위한 LNA 설계에 관한 연구)

  • Kwak, Yong-Soo;Chung, Tae-Kyung;Kim, Hyeong-Seok
    • Proceedings of the KIEE Conference
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    • 2004.07c
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    • pp.2034-2036
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    • 2004
  • In this paper, a low noise amplifier (LNA) in receiver of Low Noise Block Down Converter (LNB) for direct broadcasting service (DBS) is implemented by using GaAs HEMT. The LNA is designed for operation between 10.7GHz-12.7GHz. The LNA consists of input, output matching circuits, DC-blocks and RF-chokes. Simulation result of the LNA shows that a noise figure is less than 1.4dB and a gain is greater than 9.2dB in the bandwidth of 10.7 to 12.7GHz with good flatness of 0.1dB.

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A Ku-band LNA for LNB module (LNB 수신단의 LNA 설계에 관한 연구)

  • Kwak Yong-Soo;Kim Hyeong-Seok
    • 한국정보통신설비학회:학술대회논문집
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    • 2004.08a
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    • pp.369-372
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    • 2004
  • In this paper, a low noise amplifier (LNA) in receiver of Low Noise Block Down Converter (LNB) for direct broadcasting service (DBS) is implemented by using GaAs HEMT The LNA is designed for operation between 10.7GHz-12.7GHz. The LNA consists of input, output matching circuits, DC-blocks and RF-chokes. The result of simulation of the LNA shows that a noise figure is less than 1.4dB and a gain is gloater than 9.2dB in the bandwidth of 10.7 to 12.7GHz with good flatness of 0. ldB

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A Study on Design of Two-Stage LNA for Ku-Band LNB Receiving Block (Ku-Band 위성통신용 LNB 수신단의 2단 저잡음 증폭기 설계에 관한 연구)

  • Kim Hyeong-Seok;Kwak Yong-Soo
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.55 no.2
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    • pp.100-105
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    • 2006
  • In this paper, a low noise amplifier(LNA) in a receiver of a low noise block down converter (LNB) for direct broadcasting service(DBS) is implemented using GaAs HEMT. The LNA is designed for the bandwidth of 11.7 GHz-12.2 GHz. The two-stage LNA consists of a input matching circuit, a output matching circuit, DC-blocks and RF-chokes. Experimental results of the LNA show the noise figure less than 1.4 dB, the gain greater than 23 dB and the flatness of 1 dB in the bandwidth of 11.7 to 12.2 GHz.

A Study on Design of 2-stage LNA of LNB module for Ku-band (Ku-Band 위성통신용 LNB 수신단의 2단 LNA 설계)

  • Kwak, Yong-Soo;Kim, Hyeong-Seok
    • Proceedings of the KIEE Conference
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    • 2005.07c
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    • pp.2318-2320
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    • 2005
  • In this paper, a low noise amplifier(LNA) in a receiver of a Low Noise Block Down Converter (LNB) for direct broadcasting service(DBS) is implemented using GaAs HEMT. The LNA is designed for the bandwidth of 11.7GHz-12.2GHz. The 2stage-LNA consists of a input matching circuit, a output matching circuit, DC-blocks and RF-chokes. The result of a simulation of the LNA using Advanced Design System(ADS) shows the noise figure less than 1.4dB, the gain greater than 23dB and the flatness of 1dB in the bandwidth of 11.7 to 12.2GHz.

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The Design of Low Noise Amplifier for Overall IMT-2000 Band Repeater (IMT-2000 중계기용 전대역 저잡음 증폭기 설계)

  • 유영길
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.39 no.4
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    • pp.409-412
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    • 2002
  • The LNA(Low Noise Amplifier) is designed for use in low cost commercial application covered fully IMT-2000 band(1920~2170MHz, BW=250MHz). It is optimized source inductance for source lead and designed to equivalent etched line. The LNA uses a high pass impedance matching network for noise match and simple structure. The bias circuit designs have been made self-biased with a negative voltage applied to gate. The power supply voltage is 8V, total current is 180mA. The LNA is biased at a Vgs of -0.4, Vds of 4V for first stage and Vds of 5V for second stage. The LNA is designed competitively for commercial product specification. The measured gain and noise figure of the completed amplifier was 20dB and 1dB, respectively. Also, input VSWR, P1dB and gain flatness was measured of 1.14 ~ l.3dB, 22.4dBm and $\pm$0.45dB, respectively. The designed LNA can be used for commercial product.

Investigation of Frequency Dependent Sensitivity of Noise Figure on Device Parameters in 65 nm CMOS

  • Koo, Min-Suk;Jung, Hak-Chul;Jhon, Hee-Sauk;Park, Byung-Gook;Lee, Jong-Duk;Shin, Hyung-Cheol
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.9 no.1
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    • pp.61-66
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    • 2009
  • We have investigated the noise sensitivity of low noise amplifier (LNA) at different frequency. This noise sensitivity analysis provides insights about noise parameters and it is very beneficial for making appropriate design trade-offs. From this work, the circuit designer can choose the adequate noise parameters tolerances.