• Journal of Electrical Engineering and Technology
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• v.9 no.4
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• pp.1277-1282
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• 2014

Concentrated flux interior permanent magnet (CFIPM) motors have the advantage that their utilization of flux linkage is more efficient than that of general IPM motors and CFIPM motors are suitable for washing machine motors, which demand low-speed, high-torque specifications. However, low efficiency occurs in the low-speed high-torque mode considering the high-speed operation for spin mode. This paper proposes a magnet overhang structure between the rotor core that reduces leakage flux and improves efficiency for a CFIPM in wash mode. Optimization of the 3D design of magnet overhang structures is performed to improve the efficiency with the same quantity of permanent magnets. The validity of the optimal design is experimentally verified through the fabrication of prototypes.

• Proceedings of the KIEE Conference
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• 2007.04a
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• pp.140-142
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• 2007

This paper presents an effective method of precise velocity control at low speed with a low resolution encoder. Multirate observer to estimate the velocity at every DSP control period is used except a constant velocity mode. The observer corrects the estimation error when detects pulse signal. Unlike the conventional methods, the multirate estimator is stable at a low speed. However, the multirate estimator shows ripples at a constant velocity. Thus, in this paper we use a velocity prediction method which uses the present velocity from the previous average velocity to reject the ripple. In a summary, at a constant speed mode, the predicted velocity is used. Otherwise, the estimated velocity by the multirate obvserver is used. The effectiveness of the multirate observer and ripple rejection at low speed is verified through various simulations.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.7
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• pp.110-120
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• 2016

A power-efficient neuromodulator is needed for implantable systems. In spite of their stimulation signal's simplicity of wave shape and waiting time of MCU(micro controller unit) much longer than execution time, there is no consideration for low-power design. In this paper, we propose a novel of low-power algorithm based on the characteristics of stimulation signals. Then, we designed and implement a neuromodulation software that we call NMS(neuro modulation simulation). In order to implement low-power algorithm, first, we analyze running time of every function in existing NMS. Then, we calculate execution time and waiting time for these functions. Subsequently, we estimate the transition time between active mode (AM) and low-power mode (LPM). By using these results, we redesign the architecture of NMS in the proposed low-power algorithm: a stimulation signal divided into a number of segments by using characteristics of the signal from which AM or LPM segments are defined for determining the MCU power reduces to turn off or not. Our experimental results indicate that NMS with low-power algorithm reducing current consumption of MCU by 76.31 percent compared to NMS without low-power algorithm.

• Progress in Superconductivity and Cryogenics
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• v.12 no.1
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• pp.56-60
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• 2010

Recently, many researches have been carried out for a high temperature superconducting (HTS) magnet which is advantageous in high critical current density and critical temperature. In HTS magnet, however, critical current is decreased by perpendicular magnetic field and persistent current is hard to maintain due to a low index value and high joint resistance compared with low temperature superconducting (LTS) magnet. In this paper, the HTS magnet using BSCCO wire was simulated through finite element method (FEM) and manufactured. we experimentally investigated operating characteristics of the compensating mode of the HTS magnet for current decay and made a comparison between persistent current mode and compensating mode. A feedback control unit was used to sustain current within specified ranges with defined upper and lower limits.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.4
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• pp.917-922
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• 2010

In this paper, a new temperature-insensitive CMOS dual-mode current reference for low-voltage low-power mixed-mode circuits is proposed. The temperature independent reference current is generated by summing a proportional to absolute temperature(PTAT) current and a complementary to absolute temperature(CTAT) current. The temperature insensitivity was achieved by the mobility and the other which is inversely proportional to mobility. As the results, the temperature dependency of output currents was measured to be $0.38{\mu}A/^{\circ}C$ and $0.39{\mu}A/^{\circ}C$, respectively. And also, the power dissipation is 0.84mW on 2V voltage supply. These results are verified by the $0.18{\mu}m$ n-well CMOS parameter.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.23 no.8
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• pp.959-965
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• 2019

In this paper, we design a low noise amplifier to support ka-band satellite communication systems using 65-nm RFCMOS process. The proposed low noise amplifier is designed with high-gain mode and low-gain mode, and is designed to control the gain according to the magnitude of the input signal. In order to reduce the power consumption, the supply voltage of the entire circuit is limited to 1 V or less. We proposed the gain control circuit that consists of the inverter structure. The 3D EM simulator is used to reduce the size of the circuit. The size of the designed amplifier including pad is $0.33mm^2$. The fabricated amplifier has a -7 dB gain control range in 3 dB bandwidth and the reflection coefficient is less than -6 dB in high gain mode and less than -15 dB in low gain mode.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.7
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• pp.42-48
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• 1994

In this paper, a low power and high speed flash Analog-to-Digital Converter using current-mode concept is proposed. Current-mode approach offers a number of advantages over conventional voltage-mode approach, such as lower power consumption small chip area improved accuracy etc. Rescently this concept was applied to algorithmic A/D Converter. But, its conversion speed is limited to medium speed. Consequently this converter is not applicable to the high speed signal processing system. This ADC is fabricated in 1.2um double metal CMOS standard process. This ADC's conversion time is measured to be 7MHz, and power consumption is 2.0mW, and differential nonlinearity is less than 1.14LSB and total harmonic distortion is -50dB. The active area of analog chip is about 350 x 550u$m^2$. The proposed ADC seems suitable for a single chip design of digital signal processing system required high conversion speed, high resolution small chip area and low power consumption.

• Journal of the Korean Society of Combustion
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• v.21 no.4
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• pp.6-15
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• 2016

The oxygen fuel MILD (Moderate or Intense Low-oxygen Dilution) combustion has been considered as one of the promising combustion technology for flame stability, high thermal efficiency, low emissions and improved productivity. In this paper, the effect of oxygen and fuel injection condition on formation of MILD combustion was analyzed using lab scale oxygen fuel MILD combustion furnace. The results show that the flame mode was changed from a diffusion flame mode to a split flame mode via a MILD combustion flame mode with increasing the oxygen flow rate. A high degree of temperature uniformity was achieved using optimized combination of fuel and oxygen injection configuration without the need for external oxygen preheating. In particular, the MILD combustion flame was found to be very stable and constant flame temperature region at 7 KW heating rate and oxygen flow rate 75-80 l/min.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.1077-1080
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• 1998

In this paper, a simple low-power current-mode CMOS wotage reference circuit is proposed. The reference circuit of enhancement-mode MOS transistors and resistors. Temperature compensation is made by adding a current component proportional to a thermal voltage to a current component proportional to a threshold voltage. The designed circuit has been simulated using a $0.65\mu\textrm{m}$ n-well CMOS process parameters. The simulation results show that the reference circuit has a temperature coefficient less than $7.8ppm/^{\circ}C$ and a power-supply(VDD) coefficient less than 0.079%/V for a temperature range from $-30^{\circ}C$ to $130^{\circ}C$ and a VDD range from 4.0V to 12V. The power consumption is 105㎼ for VDD=5V and $T=30^{\circ}C.$ The proposed reference circuit can be designed to generate a wide range of reference voltages owing to its current-mode operation.

• Proceedings of the KIEE Conference
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• 1991.07a
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• pp.857-860
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• 1991

This paper describes a High-Speed 8-bit Current-Mode BiCMOS A/D Converter. The characteristics of this A/D Converter are as fellows. First, as ADC is operating in current-mode we can obtain the properties of increase of converting speed, low noise, and wideband. Second, the properties of high switching speed in bipolar transistor and of high packing density, low power consumption in MOS trnsistor are combined. Finally we reduce chip area by designing it with subranging mode and improve the converting speed by performing subtraction directly, which doesn't need D/A convertings, using current switching element. This converter is composed of two 4-bit ADC, current soure array which provides signal and reference current, current comparator and encoding network.