• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.8A
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• pp.1259-1264
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• 1999

In this paper, the High-speed, Low-power Analog-Digital Conversion Archecture is porposed using the Pipelined archecture for High-speed conversion rate and the Successive-Approximation archecture for Low-power consumption. This archecture is the Successive-Approximation archecture using Pipelined Comparator array to change reference voltage during Holding Time. The Analog-to-Digital Converter for video processing is designed using 0.8${\mu}{\textrm}{m}$ CMOS tchnology. When an 6-bit 10MS/s Analog-to-Digital Converter is simulatined, the INL/DNL errors are $\pm$0.5/$\pm$1, respectively. The SNR is 37dB at a sampling rate of 10MHz with 100KHz sine input signal. The power consumption is 1.46mW at 10MS/s. When an 8-bit 10MS/s Analog-to Digital Converter is simulatined, the INL/DNL errors are $\pm$0.5/$\pm$1, respectively. The SNR is 41dB at a sampling rate of 100MHz with 100KHz sine input signal. The power consumption is 4.14m W at 10MS/s.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.9
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• pp.1241-1244
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• 2020

In this paper, we consider a downlink non-orthogonal multiple access system with a base station and N mobile stations, where we assume that instantaneous channel state information (CSI) is available at the base station. A power allocation scheme is proposed to achieve perfect fairness, which means equal data rates for all mobile stations. However, the power allocation scheme using full CSI requires high complexity. Hence, a simple power allocation scheme with low complexity is proposed by using high signal-to-noise power ratio (SNR) approximation. The simple power allocation scheme can achieve perfect fairness only for high SNR. However, it needs only the best CSI and the simple procedure to obtain power allocation coefficients. From simulation results, we show that the simple power allocation scheme provides remarkable fairness performance at high SNR.

• The Journal of the Korea institute of electronic communication sciences
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• v.4 no.3
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• pp.190-196
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• 2009

A new time adapted threshold using the standard deviations of Wavelet coefficients after Wavelet transform by frame scale is proposed. The time adapted threshold is set up using the sum of standard deviations of Wavelet coefficient in level 3 approximation and weighted level 1 detail. Level 3 approximation coefficients represent the voiced sound with low frequency and level 1 detail coefficients represent the unvoiced sound with high frequency. After reducing noise by soft thresholding with the proposed time adapted threshold, there are still residual noises in silent interval. To reduce residual noises in silent interval, a detection algorithm of silent interval is proposed. From simulation results, it can be noticed that SNR and MSE of the proposed algorithm are improved than those of Wavelet transform and than those of Wavelet packet transform.

• Journal of the Korea Computer Industry Society
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• v.6 no.2
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• pp.271-278
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• 2005

This paper proposed a new time adapted threshold using the standard deviations of Wavelet coefficients after Wavelet transform by frame scale. The time adapted threshold is set up using the sum of standard deviations of Wavelet coefficient in level 3 approximation and weighted level 1 detail. Level 3 approximation coefficients represent the voiced sound with low frequency and level 1 detail coefficients represent the unvoiced sound with high frequency. After reducing noise by soft thresholding with the proposed time adapted threshold, there are still residual noises in silent interval. To reduce residual noises in silent interval, a detection algorithm of silent interval is proposed. From simulation results, it is demonstrated that the proposed algorithm improves SNR and MSE performance more than Wavelet transform and Wavelet packet transform does.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.9 no.7
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• pp.2371-2388
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• 2015

In this paper, we investigate the performance evaluation of three dimensional (3D) multiple-input multiple-output (MIMO) systems with an adjustable base station (BS) antenna tilt angle and zero-forcing (ZF) receivers in Ricean/Lognormal fading channels. In particular, we take the lognormal shadow fading, 3D antenna gain with antenna tilt angle and path-loss into account. First, we derive a closed-form lower bound on the sum rate, then we obtain the optimal BS antenna tilt angle based on the derived lower bound, and finally we present linear approximations for the sum rate in high and low-SNR regimes, respectively. Based on our analytical results, we gain valuable insights into the impact of key system parameters, such as the BS antenna tilt angle, the Ricean K-factor and the radius of cell, on the sum rate performance of 3D MIMO with ZF receivers.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.2
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• pp.37-42
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• 2000

In this paper, The high-speed, low-Power analog-to-digital conversion structure is proposed using the pipelined comparator away for high-speed conversion rate and the successive- approximation structure for low-power consumption. This structure is the successive-approximation structure using pipelined comparator array to change the reference voltage during the holding time. An 8-bit 10MS/s analog-to-digital converter is designed using 0.8${\mu}{\textrm}{m}$ CMOS technology. The INL/DNL errors are $\pm$0.5/$\pm$1, respectively. The SNR is 41㏈ at a sampling rate of 10MHz with 100KHz sine input signal. The Power consumption is 4.14㎽ at 10MS/s.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.263-266
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• 1999

In this work, a A/D converter is implemented to obtain 8bit resolution at a conversion rate of 10MS/s for video applications. This architecture is proposed using the Pipelined architecture for high speed conversion rate and the Successive - Approximation architecture for low power consumption, and consists of two identical stages that consist of sample/hold circuit, low power comparator, voltage reference circuit and MDAC of binary weighted capacitor array. Proposed A/D converter is designed using 0.25${\mu}{\textrm}{m}$ CMOS technology The SNR is 80㏈ at a sampling rate of 10MHz with 1.95MHz sine input signal. When an 8bit 10MS/s A/D converter is simulated, the Differential Nonlinearity / Integral Nonlinearity (DNL/ INL) error are $\pm$0.5 / $\pm$2 LSB, respectively. The power consumption is 13㎽ at 10MS/s.

• Journal of Internet Computing and Services
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• v.8 no.4
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• pp.1-9
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• 2007

Decision fusion in wireless sensor networks under non-Gaussian noise channels is studied. To consider the tail behavior noise distributions, we use a exponentially-tailed distribution as a wide class of noise distributions. Based on a canonical parallel fusion model with fading and noise channels, the likelihood ratio(LR) based fusion rule is considered as an optimal fusion rule under Neyman-Pearson criterion. With both high and low signal-to-noise ratio (SNR) approximation to the optimal rule, we obtain several suboptimal fusion rules. and we propose a simple fusion rule that provides robust detection performance with a minimum prior information, Performance evaluation for several fusion rules is peformed through simulation. Simulation results show the robustness of the Proposed simple fusion rule.