• Proceedings of the KOSOMBE Conference
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• v.1993 no.05
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• pp.129-131
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• 1993

A transcutaneoos information transmission system using transmitted infrared light for an implantable total artificial heart(TAH) an developed and the performance of the system was tested. In an in vitro test, transmittance of the developed system was measured through various thicknesses of pig shins. In an in vivo test, a loopback test using a personal computer was performed to determine the error rate and an experiment using a mock system was taken. In this experiment, within acceptable lateral and vertical displacements, the error rate of at least 3.8E-6 was guaranteed. Monitoring signals from the internal controller(Intel 87C196) of the mock system were successfully transmitted to the external controller(IBM PC) and the operating commands from the external controller were successfully conducted by the mock system. Communication was done in half duplex mode according to RS-232 protocol at the speed of 4800 bps.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.37 no.2
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• pp.187-192
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• 2009

Telecommand & telemetry control equipment is needed for the testing of the transponders during the development of satellite. This equipment must have a loopback function to perform the self testing without satellite. The fabrication of the designed system is easier and cheaper than the conventional testing system using direct modulation method. The measured results of fabricated equipment are satisfied with required specifications. A overall path loss of uplink and downlink is 47.8 dB and 42.6 dB, respectively. Also, IMD3 of uplink has measured 60.68 dBc at an output of -50 dBm.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.9
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• pp.11-17
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• 2004

This paper describes the implementation of monolithic optical transceiver circuitry being used as a part of the fiber optic modules. It has been fabricated in 0.6 ${\mu}{\textrm}{m}$ 2-poly 3-metal silicon CMOS analog technology and operates at 155.52 Mbps(STM-1) data rates. It drives laser diode to transmit intensity modulated optical signal according to 155.52 Mbps electrical data from system. Also, it receives 155.52 Mbps optical data that transmitted from other systems and converts it to electrical data using photo diode and amplifier. To avoid noise and interference between transmitter and receiver on one chip, layout techniques such as special placement, power supply separation, guard ring, and protection wall were used in the design. The die area is 4 ${\times}$ 4 $\textrm{mm}^2$, and it has 32.3 ps rms and 335.9 ps peak to peak jitter on loopback testing. the measured power dissipation of whole chip is 1.15 W(230 mW) with a single 5 V supply.

• Journal of KIISE:Computing Practices and Letters
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• v.9 no.4
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• pp.447-454
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• 2003

The forwarding enging, which handles the incoming frames and forwards them to the appropriate outgoing interface, is the crucial factor of the router´s performance. As the MPLS label edge router provides the facility that it is capable of interworking with various kinds of networks, the forwarding engine should have the flexibility processing the corresponding types of frames from such network interfaces. In order to support the flexibility, we implement the forwarding engine for the MPLS LER with ATM interfaces based on the programmable Ethernet packet processor. By exploiting instinct loop-back functionality of Ethernet packet processor, our forwarding engine handles and forwards the frames from/to ATM interfaces. The performance of our forwarding engine is evaluated by experiments on the effect of looping frames back and the number of Ethernet packet processor´s instructions.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.4
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• pp.984-995
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• 1996

Data errors according to the various noises caused in the satellite communication links are corrected by the Viterbi decoding algorithm which has extreme error correcting capability. In this paper, we designed and implemented a convolutional encoder and Viterbi decoder ASIC which is used to encode the input data at the transmit side and correct the errors of the received data at the receive side for use in the VSAT communication system. And this chip may be used in any BPSK, QPSK, or OQPSK transmission system. The ambiguity resolver corrects PSK modem ambiguities by delaying, interting, and/or exchanging code symbol to restore their original sequence and polarity. In case of previous decoding system, ambiguity state(AS) of data is resolved by external control logic and extra redundancy data are needed to resolve AS. But, by adopting decoder proposed in this paper, As of data is resolved automatically by internal logic of decoder in case of continuous mode, and by external As line withoug extra redudancy data in burst mode case. So, decoding parts are simple in continuous mode and transmission efficiency is increased in bust mode. The features of this chip are full duplex operation with independent transmit and receive control and clocks, start/stop inputs for use in burst mode systems, loopback function to verify encoder and decoder, and internal or external control to resolve ambinguity state. For verification of the function and performance of a fabricated ASIC chip, we equiped this chip in the Central and Remote Earth Station of VSAT system, and did the performance test using the commerical INTELSAT VII under the real satellite link environmens. The results of test were demonstrated the superiority of performance.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.6C
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• pp.462-468
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• 2012

In this paper, an adaptive digital automatic gain control(AGC) algorithm with two stages is proposed. AGC technique is crucial for mobile communication equipment because path loss in wireless channel and gain fluctuation in receiver front-end continuously change the received signal strength. Furthermore, adaptive criteria should be applied to the design of AGC algorithm in order to support many waveforms with one SDR communication device. With these reasons, a two-stage structure is proposed to satisfy both flexibility and adaptiveness. Compared with conventional method, it also requires shorter convergence time. Numerical results show that the gain value of variable gain amplifier(VGA) is converged within proper time and proposed scheme controls the input level of analog to digital converter(ADC) to be stable during long range of time.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.1
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• pp.58-68
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• 2010

In this paper, we propose an efficient link protection switching scheme for provider backbone bridge systems with a spanning tree for backup links exclusively, and evaluate its performance. The proposed scheme offers guaranteed QoS flows even when a link fault occurrs in the primary link by flooding the flows over the profiled spanning tree. The flooding mechanism over the spanning tree can also provide low latency and remove the loopback flows. We also derive the efficiency of bandwidth usage for the normal flows and the number of lost frames during the link restoration. For evaluating its feasibility, we implement a prototype of PBB-TE systems based on the Linux bridge codes, which can support both link protection switching capability with CCM and MAC-in-MAC encapsulation. A related protocol analyzer is also developed. One can see that the proposed scheme and the prototype can be useful for developing carrier class Ethernet systems based on PBB-TE.