• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.587-591
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• 2004

This paper proposes a novel current compensation technique that can eliminate the harmonic currents included in line currents without computation of harmonic current components. A current controller with fast dynamics for an active filter is described. Harmonic currents are directly controlled without the need for sensing and computing the harmonic current of the load current, thus simplifying the control system. Current compensation is done in the time domain, allowing a fast time response. The DC voltage control loop keeps the voltage across the DC capacitor constant. High power factor control by an active filter is described. All control functions are implemented in software using a single-chip microcontroller, thus simplifying the control circuit. Any current-controlled synchronous rectifier can be used as a shunt active filter through only the simple modification of the software and the addition of current sensors. It is shown through experimental results that the proposed controller gives good performance for the shunt active filter.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.41 no.2
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• pp.144-155
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• 1992

A design of a highly stable current-controlled power supply combining the phase-controlled rectifier (PCR), passive filter and active filter is investigated. A digital phase-looked voltage control (PLVC) with a capability of compensating the thyristor firing angles under unvalanced power source is proposed` otherwise the PCR output voltage has low-order subharmonics whose suppression requires a bulky passive filter. The digital PLVC has a fast dynamic characteristics as an inner control loop of the PCR. To suppress further the output ripple, an active filter using a transformer is introduced and its design is described through the frequency domain analysis. An optimal integral, proportional and measurable variable feedback (IPM) controller is designed using the time-weighted performance index based on the time domain analysis. The design method based on the time-weighted performance index gives better response characteristics than that based on the conventional performance index. It is also shown via experimental results that the proposed scheme gives better response characteristics than that based on the conventional performance index. It is also shown via experimental results that the proposed scheme gives good dynamic and static performances.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.10
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• pp.1796-1801
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• 2008

In this paper, a new current based maximum power point tracking (CMPPT) method is proposed for a single phase photovoltaic power conditioning system and the current based MPPT modifies incremental conductance method. The current based MPPT method makes the entire control structure of the power conditioning system simple and uses an inherent current source characteristic of solar cell array. In addition, digital phase locked loop using an all pass filter is introduced to detect phase of grid voltage as well as peak voltage. Controllers about dc/dc boost converter, dc-link voltage, dc/ac inverter is designed for a coordinated operation. Furthermore, PI current control using a pseudo synchronous d-q transformation is employed for grid current control with unity power factor. 3kW prototype photovoltaic power conditioning system is built and its experimental results are given to verify the effectiveness of the proposed control schemes.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.6
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• pp.51-56
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• 2010

In this paper, a novel Integer-N phase-delay locked loop(P DLL) architecture has been proposed using a voltage controlled delay line(VCDL). The P DLL can have the LF of one small capacitance instead of the conventional second or third-order LF. The size of chip is $255{\mu}m$ $\times$ $935.5{\mu}m$ including the LF. The proposed P DLL has been designed based on a 1.8V $0.18{\mu}m$ CMOS process and proved by HSPICE simulation.

• Journal of Power Electronics
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• v.16 no.1
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• pp.18-26
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• 2016

This paper proposes a compensation algorithm for reducing a specific ripple component on synchronous reference frame phase locked loop (SRF-PLL) in grid-tied single-phase inverters. In general, SRF-PLL, which is based on all-pass filter to generate virtual voltage, is widely used to estimate the grid phase angle in a single-phase system. In reality, the estimated grid phase angle might be distorted because the phase difference between actual and virtual voltages is not 90 degrees. That is, the phase error is caused by the difference between cut-off frequency of all-pass filter and grid frequency under grid frequency variation. Therefore, the effects on phase angle and output current attributed to the phase error are mathematically analyzed in this paper. In addition, the proportional resonant (PR) controller is adapted to reduce the effects of phase error. The validity of the proposed algorithm is verified through several simulations and experiments.

• Journal of Power Electronics
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• v.17 no.6
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• pp.1637-1649
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• 2017

This paper describes an intensive analysis of a harmonic identification algorithm in non-ideal voltages source systems. The dq-axis Fourier with a positive sequence voltage detector (DQFP) is a novel harmonic identification algorithm for active power filters. A compensating current control system based on repetitive control is presented. A design and stability analysis of the proposed current control are also given. The aim of the paper is to achieve a robustness of the harmonic identification in a distorted and unbalanced voltage source. The proposed ideas are supported by a hardware in the loop technique based on a $eZdsp^{TM}$ F28335 and the Simulink program. The obtained results are presented to demonstrate the performance of the harmonic identification and the control strategy for the active power filter in non-ideal systems.

• Journal of Power Electronics
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• v.11 no.3
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• pp.369-374
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• 2011

Usually, a LPF (low pass filter) is used in the feedback loop of a SRF (synchronous reference frame) - PLL (phase locked loop) system because the measured grid voltage contains harmonic distortions and sensor noises. In this paper, it is shown that the cut-off frequency of the LPF should be designed to suppress the harmonic ripples contained in the measured voltage. Also, a new design method for the loop gain of the PI-type controller in the SRF-PLL is proposed with consideration of the dynamics of the LPF. As a result, a better transient response can be obtained with the proposed design method. The LPF frequency and the PI controller gain are designed in coordination according to the steady state and dynamic performance requirements. Furthermore, in the proposed method, the controller gain and the LPF cut-off frequency are changed from their normal value to a transient value when a voltage disturbance is detected. This paper shows the feasibility and usefulness of the proposed methods through the computer simulations and experimental results.

• Proceedings of the KIEE Conference
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• 1999.11a
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• pp.56-60
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• 1999

This paper presents the high performance real time control system of PWM inverter for uninterruptible power supply(UPS). This system is based on a digital control scheme which calculates the pulse widths of the inverter switches for the next sampling time in digital signal processor(DSP). A PI compensator is used to eliminate the voltage error caused by the difference between the actual values of LC filter and those designed. Double regulation loops which are the inner current loop and the outer voltage loop are used to make the transient response time reduce in load disturbance and nonlinear load. This method makes it possible to obtain better response in comparison to conventional digital control system. The proposed scheme provides good performance such as stable operation, low THD of the output voltage, and good dynamic response for load variations and nonlinear load.

• Proceedings of the KIPE Conference
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• 1997.07a
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• pp.454-459
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• 1997

The good features of a switched reluctance motor(SRM) are appreciated by the appliance manufactures. And it is spread into a commercial and industries market. The few disadvantage of the motor is higher torque ripple and noise. This paper proposes an instantaneous torque control scheme to control a speed precisely. It adapts phase-locked loop (PLL) technique to control speed precisely. In this control scheme, the phase detector signal of the PLL regulates the switching dwell angle flexibly and the loop filter's signal controls adaptively the instantaneous switching voltage. Experimental results show that drive performance is good with low torque ripple.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.5
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• pp.1005-1009
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• 2010

This paper presents a digitally-controlled filter calibration technique for biquad RC filter using self oscillation. The biquad RC filter is converted to a fully-differential ring oscillator by changing its resistor connections, where the oscillation frequency reflects the cut-off frequency. The proposed calibration circuit measures the oscillation frequency by counting with a fixed higher-frequency clock and then tunes it to a desired frequency with a digital frequency-locked loop including a PI controller. Because the proposed circuit directly measures the cut-off frequency of the filter itself and calibrates it with the small area digital circuits, the area and the power consumption are much small compared with conventional works. When it is implemented in a 65nm CMOS process, the calibration circuit except the filter consumes the area of 80um X 50um and power consumption is 443uA at 1.2 V supply voltage.