• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.3-4
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• 2006

Fast IP address lookup in routers is essential to achieve packet forwarding in wire-speed. The longest prefix matching for IP address lookup is more complex than exact matching because of its dual dimensions, length and value. By thoroughly studying the current proposals for IP address lookup, we find out that the binary search could be a low-cost solution while providing high performance. Most of the existing binary search algorithms based on trie have simple data structures which can be easily implemented, but they have some problems because of empty internal nodes. The proposed algorithm is based on trie structure, but empty internal nodes are replaced by priority prefixes. The best-matching-prefix search in the proposed algorithm is more efficiently performed since search can be finished earlier when input is matched with a priority prefix. The performance evaluation results show that the constructed priority-trie has very good performance in the lookup speed and the scalability.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.12
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• pp.2061-2068
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• 2016

A Bloom filter is a space-efficient data structure popularly applied in many network algorithms. This paper proposes a vectored Bloom filter to provide a high-speed Internet protocol (IP) address lookup. While each hash index for a Bloom filter indicates one bit, which is used to identify the membership of the input, each index of the proposed vectored Bloom filter indicates a vector which is used to represent the membership and the output port for the input. Hence the proposed Bloom filter can complete the IP address lookup without accessing an off-chip hash table for most cases. Simulation results show that with a reasonable sized Bloom filter that can be stored using an on-chip memory, an IP address lookup can be performed with less than 0.0003 off-chip accesses on average in our proposed architecture.

• Proceedings of the Korean Information Science Society Conference
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• 2006.06d
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• pp.124-126
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• 2006

Mobile Ad hoc networking is an emerging technology and in these days many applications are being developed to run on these networks. In these networks lookup services are very important because all nodes do not have same resources in term of memory and computing power. Nodes need to use different services offered by different servers. Reliable and efficient scheme should be available for lookup services due to limited bandwidth and low computing power of devices in mobile ad hoc networks. Due to mobility and rapid change in network topology, lookup mechanism used in wired network is not appropriate. Service discovery mechanism can be divided into two main categories Centralized and Distributed. Centralized mechanism is not reliable as there is no central node in these networks. Secondly centralized mechanism leads toward single point failure. We can handle the service discovery mechanism by distributing server's information to each node. But this approach is also not appropriate due to limited bandwidth and rapid change in network. In this paper, we present reliable lookup service scheme which is based on distributed mechanism. We are not using replication approach as well due to low bandwidth of wireless networks. In this scheme service discovery mechanism will be handled through different lookup servers. Reliability is the key feature of our proposed scheme.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.12
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• pp.75-81
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• 2004

AE-CORDIC improves the CORDIC operation speed with a rotation direction pre-computation algorithm. Its CORDIC iteration stages consist of non-predictable rotation direction states and predictable rotation stages. The non-predictable stages are replaced with lookup-table which has smaller hardware size than CORDIC iteration stages. The predictable stages can determine rotation direction with the input angle and simple encoder. In this paper, a rotation direction pre-computation algorithm with input angle encoder is proposed. and AE-CORDIC which have optimized Lookup-table is compared with the P-CORDIC algorithm. Hardware size, delay, and SQNR of the AE-CORDIC are verified with Samsung 0.18㎛ technology and Synopsys design compiler when input angle bit length is 16.

• The Journal of the Korea Contents Association
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• v.7 no.3
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• pp.50-59
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• 2007

IP address lookup is one of the most important and complex functions in the router. In this paper, we propose an improved technique of LC-trie to increase the performance of IP address lookup in the high performance router. We effectively apply the prefix pruning method, which is used for the compression of the forwarding table in TCAM((Ternary Content Addressable Memory), to the LC-trie. This technique can decrease the number of memory accesses and upgrade the lookup speed. Moreover, through the real forwarding table and the real traffic distribution, we evaluate the performance of our scheme in terms of the lookup time and the number of memory access, comparing with that of the previous LC-trie.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.13 no.4
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• pp.1922-1940
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• 2019

IP address lookup is a function to determine nexthop for a given destination IP address. It takes an important role in modern routers because of its computation time and increasing Internet traffic. TCAM-based IP lookup approaches can exploit the capability of parallel searching but have a limitation of its size due to latency, power consumption, updatability, and cost. On the other hand, multibit trie-based approaches use SRAM which has relatively low power consumption and cost. They reduce the number of memory accesses required for each lookup, but it still needs several accesses. Moreover, the memory efficiency and updatability are proportional to the number of memory accesses. In this paper, we propose a novel architecture using an Indexed Multibit Trie (IMT) which is based on combined TCAM and SRAM. In the proposed architecture, each lookup takes at most two memory accesses. We present how the IMT is constructed so as to be memory-efficient and fast updatable. Experiment results with real-world forwarding tables show that our scheme achieves good memory efficiency as well as fast updatability.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.42 no.3
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• pp.566-576
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• 2017

Key-value stores proved its superiority by being applied to various NoSQL databases such as Redis, Memcached. Lookup performance is important because key-value store applications performs more lookup than insert operations in most environments. However, in traditional applications, lookup may be slow because hash tables are constructed out of linked-list. Therefore, cuckoo hashing has been getting attention from the academia for constant lookup time, and bucketized cuckoo hashing (BCH) has been proposed since it can achieve high load factor. In this paper, we introduce Sorting Cuckoo which inserts data using insertion sort in BCH structure. Sorting Cuckoo determines the existence of a key with a relatively small memory access because data are sorted in each buckets. In particular, the higher memory load factor, the better lookup performance than BCH's. Experimental results show that Sorting Cuckoo has smaller memory access than BCH's as many as about 19 million (25%) in 10 million negative lookup operations (key is not in the table), about 4 million times (10%) in 10 million positive lookup operations (where it is) with load factor 95%.

• The KIPS Transactions:PartA
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• v.10A no.5
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• pp.453-462
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• 2003

IP address lookup of router searches and decide proper output link using destination address of IP packet that arrie into router. The IP address lookup is essential part in te development of high-speed router needed to high-speed backbone network as one of bottleneck of router performance. This paper introduces DTC data structure that can support gigabit IP address lookup by dynamic trie compression technique that just uses small memory in conventional Pentium CPU. When make a forwarding table by trie compression, the DTC can dynamically select a size of data structure with considering correlation between table's size and searching speed. Also, when compress the prefix trie, DTC makes IP address lookup on the forwarding table of a search on the high speed SRAM cache by minimizing the size of data structure reflecting the structure of the trie. In the experiment result, the DTC data structure recorded performance of maximum $12.5{\times}10^5$ LPS (lookup per second) in conventional Pentium CPU through a dynamic building of most suitable compression over variety of routing tables.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.2B
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• pp.158-166
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• 2004

Address lookup is one of the most essential functions of the Internet routers and a very important feature in evaluating router performance. Due to the facts that the Internet traffic keeps growing and the number of routing table entries is continuously growing, efficient address-lookup mechanism is indispensable. In recent years, various fast address-lookup schemes have been proposed, but most of those schemes are not practical in terms of the memory size required for routing table and the complexity required in table update In this paper, we have proposed a parallel IP address lookup architecture based on multiple hashing. The proposed scheme has advantages in required memory size, the number of memory accesses, and table update. We have evaluated the performance of the proposed scheme through simulation using data from MAE-WEST router. The simulation result shows that the proposed scheme requires a single memory access for the address lookup of each route when 203kbytes of memory and a few-hundred-entry TCAM are used.

• The Journal of the Korea Contents Association
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• v.13 no.2
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• pp.44-51
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• 2013

Routers should perform fast IP address lookup for Internet to provide high-speed service. In this paper, we present a hybrid parallel IP address lookup structure composed of four-stage pipeline. It achieves parallelism at low cost by using multiple SRAMs in stage 2 and partitioned TCAMs in stage 3, and improves the performance through pipelining. The smart distributor in stage 1 does not transfer any IP address identical to previous one toward the next stage, but only uses the result of the previous lookup. So it improves throughput of lookup by caching effects, and decreases the access conflict to TCAM bank in stage 3 as well. In the last stage, the reorder buffer rearranges the completed IP addresses according to the input order. We evaluate the performance of our parallel pipelined IP lookup structure comparing with previous hybrid structure, using the real routing table and traffic distributions generated by Zipf's law.