• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2022.10a
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• pp.532-535
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• 2022

Path following algorithms have been intensively studied for various mobile platforms such as planetary exploration, unmanned delivery, and autonomous driving. However, ensuring high accuracy in practical applications is challenging due to enormous uncertainty inherent in real environment. In this paper, we aim to reveal the guideline for the design and implementation by investigating the path following performance of mobile robot controlled by the pure pursuit algorithm. To this end, we evaluate the accuracy of the pure pursuit algorithm when tuning the look ahead distance and deploying erroneous actuator.

• Journal of the Korea Fashion and Costume Design Association
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• v.14 no.2
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• pp.11-21
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• 2012

The purpose of this study is to understand of future image in fashion for 20C, to suggest a guideline's role in the development on fashion designs study. The methods of this study are used academic literatures as well as practical study. Futuristic image in fashion is to introduce about the future period, as fashion goes ahead times. Trends and formative characteristics of future image in 20C fashion are summarized as follows. First, futuristic images in fashion for 20C had emerged strongly futurism, space look, kinetic look, glitter look, techno look, cyber look. Second, perspectives on response for future society's changes are summarized as follows. Attitude of futuristic images of fashion, futurism, space look, kinetic look and glitter look, had been favorable about future society's changes until 1980. In 1990, techno look had been defensive and cyber look had been aggressive about future society's changes. Third, formative characteristics of future image in 20C fashion are studied shape, material, color, pattern. Shape was preferred linear and geometric form in the first half of the 20C, but body conscious type had appeared often in the second half of 20C. Material maintained the luster or the metal touch. Color was based image of colorless and preferred the gold, silver or color feels like metal. Pattern was preferred clarity with geometric type in the first half of the 20C. On the other hand in the second half of 20C pattern of future image was dominated by vague and abstract chaotic type.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.3
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• pp.397-409
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• 1993

This paper proposed the design methodology of the 8 bit binary parallel adder with carry book-ahead scheme via current-mode CMOS multivalued logic and simulated the proposed adder under $5{\mu}m$ standard IC process technology. The threshold conditions of $G_K$ and $P_K$ which are needed for m-valued parallel adder with CLA are evaluated and adopted for quaternary logic. The design of quaternary CMOS logic circuits, encoder, decoder, mod-4 adder, $G_K$ and $P_K$ detecting circuit and current-voltage converter is proposed and is simulated to prove the operations. These circuits are necessary for binary arithmetic using multivalued logic. By comparing with the conventional binary adder and the CCD-MVL adder, We show that the proposed adder cab be designed one look-ahead carry generator with 1-level structure under standard CMOS technology and confirm the usefulness of the proposed adder.

• Proceedings of the ESK Conference
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• 1995.10a
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• pp.172-181
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• 1995

A control panel layout system was developed to generate an ergrnomically sound panel design. A constraint satisfaction concept was introduced as a framework of incorporating diverse ergonomic design guidelines into the panel layout. An efficient search algorithm which can find a constraint satisfaction solution within a reasonable time was developed based on preprocess and look ahead procedures with the backjumping technique. The proto- type panel layaout system was developed on a SPARC workstation. The constraint satisfaction algorithm was programmed in C language with Motif as a GUI tool under the X-windows environment. The effectiveness of the prototype paned layout system was examined by a case study.

• Proceedings of the Korean Information Science Society Conference
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• 2003.10a
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• pp.337-339
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• 2003

본 논문은 내장형 시스템의 전력 감소를 위해 사용되는 과거 사용량 기반의 DVS의 단점 인 응용 프로그램의 수행 성능 저하를 보상하기 위해, 운영체제의 스케줄러에서 제공하는 태스크의 미래정보를 이용하는 기법을 제안한다. 대표적 내장형 운영체제인 WinCE.net에서의 스케줄러는 제한된 자원의 효율적 관리를 위하여 동일 응용프로그램의 태스크들을 관리하면서 다음 태스크 시행시간 정보를 갖게 된다. 이러한 룩 어헤드(look ahead)정보와 과거사용량기법을 혼합한 혼합예측기법이 실제 내장형 시스템에서 전력소비를 감소시키며 응용프로그램의 수행 성능보상을 할 수 있음을 보인다.

• Journal of Korean Institute of Industrial Engineers
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• v.25 no.4
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• pp.421-436
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• 1999

It is discussed how to locate idle vehicles of AGVS considering dynamically changing situation. Several positioning methods are suggested including static positioning, dynamic positioning with time-independent pickup probabilities, dynamic positioning with time-dependent pickup probabilities, and dynamic positioning with a look-ahead capability. These positioning strategies are compared with each other by a simulation experiment.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.7B
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• pp.433-439
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• 2005

In this paper, we propose a Flow Based Waiting Time Priority (FB-WTP) scheduler that supports the proportional delay differentiated services between classes. Existing scheduling algorithms utilize the configuration of scheduler, which is operated as class unit, applied to wired network. However, FB-WTP scheduler is operated as flow unit and can take advantage of multi-flow diversity effect in time-varying channel state environment. As a result, FB-WTP improves the average queueing delay on each class as well as supporting the average queueing delay ratio between classes. It also solves the HOL packet blocking problem implicitly. Simulation results show that FB-WTP scheduler has better system queueing delay performance than Look-ahead Waiting Time Priority (LWTP) scheduler and supports the larger queueing delay ratio between classes that network operator set.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.3C
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• pp.256-262
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• 2002

This paper presents a novel radix-4 modular multiplication algorithm based on the sign estimation technique (3). The sign estimation technique detects the sign of a number represented in the form of a carry-sum pair. It can be implemented with 5-bit carry look-ahead adder. The hardware speed of the cryptosystem is dependent on the performance modular multiplication of large numbers. Our algorithm requires only (n/2+3) clock cycle for n bit modulus in performing modular multiplication. Our algorithm out-performs existing algorithm in terms of required clock cycles by a half, It is efficient for modular exponentiation with large modulus used in RSA cryptosystem. Also, we use high-speed adder (7) instead of CPA (Carry Propagation Adder) for modular multiplication hardware performance in fecal stage of CSA (Carry Save Adder) output. We apply RL (Right-and-Left) binary method for modular exponentiation because the number of clock cycles required to complete the modular exponentiation takes n cycles. Thus, One 1024-bit RSA operation can be done after n(n/2+3) clock cycles.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.40 no.11
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• pp.979-987
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• 2012

This paper implements and integrates algorithms for terrain following of UCAVs (Unmanned Combat Aerial Vehicles): trajectory generation, guidance, and navigation. Terrain following is very important for UCAVs because they perform very dangerous missions such as Suppression of Enemy Air Defences while the terrain following can improve the survivability of UCAVs against from the air defence systems of the enemy. To deal with the GPS jamming, terrain referenced navigation based on nonlinear filter is chosen. For the trajectory generation, Voronoi diagram is adopted to generate horizontal plane path to avoid the air defense system. Cubic spline method is used to generate vertical plane path to prevent collisions with ground while flying sufficiently close to surface. Follow-the-Carrot and pure pursuit tracking methods, which are look-ahead point based guidance algorithms, are applied for the guidance. Numerical simulation is performed to verify the performance of the integrated terrain following algorithm.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.7
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• pp.53-61
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• 2004

In this paper, we proposed a new architecture of MAC(Multiplier-Accumulator) to operate high-speed multiplication-accumulation. We used the MBA(Modified radix-4 Booth Algorithm) which is based on the 1's complement number system, and CSA(Carry Save Adder) for addition of the partial products. During the addition of the partial product, the signed numbers with the 1's complement type after Booth encoding are converted in the 2's complement signed number in the CSA tree. Since 2-bit CLA(Carry Look-ahead Adder) was used in adding the lower bits of the partial product, the input bit width of the final adder and whole delay of the critical path were reduced. The proposed MAC was applied into the DWT(Discrete Wavelet Transform) filtering operation for JPEG2000, and it showed the possibility for the practical application. Finally we identified the improved performance according to the comparison with the previous architecture in the aspect of hardware resource and delay.