• Title/Summary/Keyword: Logical Architecture

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The Design and Implementation of Restructuring Tool with Logical Analysis of Object-Oriented Architecture and Design Information Recovery (설계 정보 복구와 객체 지향 구조의 논리적 분석을 통한 재구성 툴 설계 및 구현)

  • Kim, Haeng-Gon;Choe, Ha-Jeong;Byeon, Sang-Yong;Jeong, Yeon-Gi
    • The Transactions of the Korea Information Processing Society
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    • v.3 no.7
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    • pp.1739-1752
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    • 1996
  • Software reengineering involves improving the software maintenance process and improving existing systems by applying new technologies and software tools. Software reengineering can help us understand existing systems and discover software components that are common across systems. In the paper, we discuss the program analysis and environment to assist reengineering. Program analysis takesan existing program as input and generates information about structured part and object-oriented part. It is used to restructure the information by extracting code through reengineering methodology. These restructuring informations with object-oriented archilccture are mapping prolog form to query by using direct reation and summary relation.

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A Variable Sample Rate Recursive Arithmetic Half Band Filter for SDR-based Digital Satellite Transponders (SDR기반 디지털 위성 트랜스폰더를 위한 가변 표본화율의 재귀 연산 구조)

  • Baek, Dae-Sung;Lim, Won-Gyu;Kim, Chong-Hoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38A no.12
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    • pp.1079-1085
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    • 2013
  • Due to the limited power supply resources, it is essential that the minimization of algorithmic operation and the reduction of the hardware logical-resources in the design of the satellite transponder. It is also required that the transponder process the signals of various bandwidth efficiently, that is suitble for the SDR-based implementation. This paper proposes a variable rate down sampler which can provide variable bandwidth and data rate for carrier, ranging and sub-band command signals respectively. The proposed down sampler can provide multiple $2^M$ decimated outputs from a single half band filter with recursive arithmetic architecture, which can minimize the hardware resources as well as the arithmetic operations. The algorithm for hardware implementation as well as the analysis for the passband flatness and aliasing is presented and varified by the FPGA implementation.

Design of Multiplierless Lifting-based Wavelet Transform using Pattern Search Methods (패턴 탐색 기법을 사용한 Multiplierless 리프팅 기반의 웨이블릿 변환의 설계)

  • Son, Chang-Hoon;Park, Seong-Mo;Kim, Young-Min
    • Journal of Korea Multimedia Society
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    • v.13 no.7
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    • pp.943-949
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    • 2010
  • This paper presents some improvements on VLSI implementation of lifting-based 9/7 wavelet transform by optimization hardware multiplication. The proposed solution requires less logic area and power consumption without performance loss compared to previous wavelet filter structure based on lifting scheme. This paper proposes a better approach to the hardware implementation using Lefevre algorithm based on extensions of Pattern search methods. To compare the proposed structure to the previous solutions on full multiplier blocks, we implemented them using Verilog HDL. For a hardware implementation of the two solutions, the logical synthesis on 0.18 um standard cells technology show that area, maximum delay and power consumption of the proposed architecture can be reduced up to 51%, 43% and 30%, respectively, compared to previous solutions for a 200 MHz target clock frequency. Our evaluation show that when design VLSI chip of lifting-based 9/7 wavelet filter, our solution is better suited for standard-cell application-specific integrated circuits than prior works on complete multiplier blocks.

A Feature-Oriented Requirement Tracing Method with Value Analysis (가치분석을 통한 휘처 기반의 요구사항 추적 기법)

  • Ahn, Sang-Im;Chong, Ki-Won
    • The Journal of Society for e-Business Studies
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    • v.12 no.4
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    • pp.1-15
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    • 2007
  • Traceability links are logical links between individual requirements and other system elements such as architecture descriptions, source code, and test cases. These are useful for requirements change impact analysis, requirements conflict analysis, and requirements consistency checking. However, establishing and maintaining traceability links places a big burden since complex systems have especially yield an enormous number of various artifacts. We propose a feature-oriented requirements tracing method to manage requirements with cost benefit analysis, including value consideration and intermediate catalysis using features. Our approach offers two contributions to the study of requirements tracing: (1)We introduce feature modeling as intermediate catalysis to generate traceability links between user requirements and implementation artifacts. (2)We provide value consideration with cost and efforts to identify traceability links based on prioritized requirements, thus assigning a granularity level to each feature. In this paper, we especially present the results of a case study which is carried out in Apartment Ubiquitous Platform to integrate and connect home services in an apartment complex in details.

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Ubiquitous Home Networking Architecture based on Virtual Overlay Network (가상 오버레이 네트워크 기반 유비쿼터스홈 네트워킹 구조)

  • Park, Ho-Jin;Park, Jun-Hee;Kim, Nam
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.47 no.7
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    • pp.8-17
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    • 2010
  • Ubiquitous home refers not only to home but also to logical space, including a wide range of out-home personal devices such as mobile phones, PDAs, laptops, car navigators, and office PCs. There are certain connection barriers among the devices, such as the dynamic IP address, NAT. In a home network, various devices coexist in heterogeneous networks, such as IP, IEEE1394, PLC, Bluetooth, ZigBee, UWB, and IrDA, all of which lack interoperability due to their different physical transmission characteristics and protocols. In ubiquitous home where an unrestricted collaboration of the devices is essential to offer services that meet the users' requirements, free interoperability among the devices must be guaranteed. This paper proposes a networking model for interoperability of the heterogeneous devices in a ubiquitous home based on a virtual overlay network which hides the complicated physical network configurations and heterogeneity of the service protocols.

Design of an Algorithm for the Validation of SCL in Digital Substations

  • Jang, B.T.;Alidu, A.;Kim, N.D.
    • KEPCO Journal on Electric Power and Energy
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    • v.3 no.2
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    • pp.89-97
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    • 2017
  • The substation is a critical node in the power network where power is transformed in the power generation, transmission and distribution system. The IEC 61850 is a global standard which proposes efficient substation automation by defining interoperable communication and data modelling techniques. In order to achieve this level of interoperability and automation, the IEC 61850 (Part 6) defines System Configuration description Language (SCL). The SCL is an XML based file format for defining the abstract model of primary and secondary substation equipment, communications systems and also the relationship between them. It enables the interoperable exchange of data during substation engineering by standardizing the description of applications at different stages of the engineering process. To achieve the seamless interoperability, multi-vendor devices are required to adhere completely to the IEC 61850. This paper proposes an efficient algorithm required for verifying the interoperability of multi-vendor devices by checking the adherence of the SCL file to specifications of the standard. Our proposed SCL validation algorithm consists of schema validation and other functionalities including information model validation using UML data model, the Vendor Defined Extension model validation, the User Defined Rule validation and the IED Engineering Table (IET) consistency validation. It also integrates the standard UCAIUG (Utility Communication Architecture International Users Group) Procedure validation for quality assurance testing. Our proposed algorithm is not only flexible and efficient in terms of ensuring interoperable functionality of tested devices, it is also convenient for use by system integrators and test engineers.

A Study on the Expression Transformation of Visual Information in 3D Architectural Models (3차원 건축모델정보의 표현변용방식에 관한 연구)

  • Park, Young-Ho
    • Korean Institute of Interior Design Journal
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    • v.22 no.1
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    • pp.105-114
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    • 2013
  • This study investigated the application and the change of various architectural models by analyzing expression viewpoint media, which were applied to the visual information of digitalized 3D contemporary architectural models. The purpose of this study was to specify how modern architects have changed 3D architectural models to conceptual, logical, and formational visual information in the process of design. This study discovered a framework of analyses by theoretically investigating a relationship between expression media and expression change in the process of visualizing architectural models. Using the framework of analyses, this study analyzed how the expression viewpoints of architectural model information have been changed and applied. The transformation media of the visual information of digitalized 3D architectural models can be classified into conceptual, analytical, and formational information: 1) Contemporary architects used author-centered subjective viewpoints to express architectural concepts, which were generated in the process of their design. They selected a perspective viewpoint and a bird's eye view in order to present their architectural concepts and to depict them with one architectural model by expanding the visual scope of conceptual information. 2) Contemporary architects adopted observer-centered objective bird's eye view expression media to effectively present their architectural information to building owners and viewers. They used transformal media, which integrate architectural information into 3D and change it to different scales, in order to express their architecture logically. 3) Contemporary architects delivered model information about the generation and change of forms by expressing the image of a project from an author-centered viewpoint, instead of objectively defining formational information. They explained the generation principle of architectural forms via transformal media which develop and rotate an architectural model.

Design and Implementation of SDN-based 6LBR with QoS Mechanism over Heterogeneous WSN and Internet

  • Lee, Tsung-Han;Chang, Lin-Huang;Cheng, Wei-Chung
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.11 no.2
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    • pp.1070-1088
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    • 2017
  • Recently, the applications of Internet of Things (IoTs) are growing rapidly. Wireless Sensor Network (WSN) becomes an emerging technology to provide the low power wireless connectivity for IoTs. The IPv6 over low-power wireless personal area networks (6LoWPAN) has been proposed by IETF, which gives each WSN device an IPv6 address to connect with the Internet. The transmission congestion in IoTs could be a problem when a large numbers of sensors are deployed in the field. Therefore, it is important to consider whether the WSN devices have be completely integrated into the Internet with proper quality of service (QoS) requirements. The Software Defined Network (SDN) is a new architecture of network decoupling the data and control planes, and using the logical centralized control to manage the forwarding issues in large-scale networks. In this research, the SDN-based 6LoWPAN Border Router (6LBR) is proposed to integrate the transmission from WSNs to Internet. The proposed SDN-based 6LBR communicating between WSNs and the Internet will bring forward the requirements of end-to-end QoS with bandwidth guarantee. Based on our experimental results, we have observed that the selected 6LoWPAN traffic flows achieve lower packet loss rate in the Internet. Therefore, the 6LoWPAN traffic flows classified by SDN-based 6LBR can be reserved for the required bandwidth in the Internet to meet the QoS requirements.

Design and Implementation of Time Management Module for IEEE 1516 HLA/RTI (IEEE 1516 HLA/RTI 표준을 만족하는 시간 관리 서비스 모듈의 설계 및 구현)

  • Hong, Jeong-Hee;Ahn, Jung-Hyun;Kim, Tag-Gon
    • Journal of the Korea Society for Simulation
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    • v.17 no.1
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    • pp.43-52
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    • 2008
  • The High Level Architecture(HLA) is the IEEE 1516 standard for interoperation between heterogeneous simulators which are developed with different languages and platforms. Run-Time Infrastructure(RTI) is a software which implements the HLA Interface Specification. With the development of time management service of RTI, it is necessary to consider an efficient design approach and an algorithm of Greatest Available Logical Time(GALT) computation. However, many time management services of existing RTIs have difficulty in modification and extension. Although some RTIs avoid this difficulty through modular design, they comply with not IEEE 1516 HLA/RTI but HLA 1.3. In addition, a lot of RTIs made use of well-known Mattern's algorithm for GALT computation. However, Mattern's algorithm has a few limitations for applying to IEEE 1516 HLA/RTI. This paper proposes a modular design and an implementation of time management service for IEEE 1516 HLA/RTI. We divided th time management service module into two sub-modules: a TIME module and a GALT module and used Mattern's algorithm improved for IEEE 1516 HLARTI. The paper also contains several experimental results in order to evaluate our time management service module.

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Vertical Handover Framework for Maritime Multi-band Networks (해상 멀티대역 네트워크를 위한 수직 핸드오버 프레임워크 설계)

  • Cho, A-Ra;Yun, Changho;Park, Jong-Won;Lim, Yong-Kon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.12
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    • pp.2847-2856
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    • 2014
  • It is necessary for maritime multi-band networks, which provide ships with diverse and seamless multimedia services, to perform vertical handover. As IEEE 802.21 WG has standardized vertical handover technologies for terrestrial wireless networks that do not consider VHF, HF, satellite networks, they cannot be directly applied to maritime multi-band networks. In this paper, the vertical handover framework for use in maritime mutlti-band networks is proposed, which includes the logical architecture, the communication reference model, re-defined handover primitives, and the handover process. The proposed vertical handover for maritime multi-band network can be applied in the ocean alone, as well as to the heterogeneous wireless networks which embrace both terrestrial and maritime networks.