• Journal of Korean Society of Industrial and Systems Engineering
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• v.19 no.37
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• pp.171-178
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• 1996

The programmable logic controller(PLC) programming has been manually carried out, which might cause the productivity decrease by omission and repetition of instruction. Recently, the knowledge-based automatic programming system is introduced. In the system, input/output(I/O) addresses are input by user. In this study, we developed the prototype system for automatic I/O addressing using knowledge-based technology, With the developed system, the PLC addressing task can he consistently and effectively performed.

• East Asian mathematical journal
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• v.7 no.1
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• pp.37-43
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• 1991

• ICROS
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• v.5 no.4
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• pp.42-49
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• 1999

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.12
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• pp.43-53
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• 1997

In this paper, the optimal synthesis algorithm of multiple-valued logic circuits using universal logic modules (ULM) U$_{f}$ based on 3-variable ternary reed-muller expansions is presented. We check the degree of each varable for the coefficients of reed-muller expansions and determine the order of optimal control input variables that minimize the number of ULM U$_{f}$ modules. The order of optimal control input variables is utilized the realization of multiple-valued logic circuits to be constructed by ULM U$_{f}$ modules based on reed-muller expansions using the circuit cost matrix. This algorithm is performed only unit time in order to search for the optimal control input variables. Also, this algorithm is able to be programmed by computer and the run time on programming is O(p$^{n}$ ).

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.2 no.1
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• pp.20-25
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• 2002

This paper presents a genetic programming based evolutionary strategy for on-line adaptive learnable evolvable hardware. Genetic programming can be useful control method for evolvable hardware for its unique tree structured chromosome. However it is difficult to represent tree structured chromosome on hardware, and it is difficult to use crossover operator on hardware. Therefore, genetic programming is not so popular as genetic algorithms in evolvable hardware community in spite of its possible strength. We propose a chromosome representation methods and a hardware implementation method that can be helpful to this situation. Our method uses context switchable identical block structure to implement genetic tree on evolvable hardware. We composed an evolutionary strategy for evolvable hardware by combining proposed method with other's striking research results. Proposed method is applied to the autonomous mobile robots cooperation problem to verify its usefulness.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.35 no.11
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• pp.487-494
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• 1986

This paper is concerned with the techniques of error check and reduction of state diagram using logic programming. Error check program aims to check not only syntax errors but also semantic errors. And reduction program optimizes the state diagram by finding the redundant equivalence states and removing those from the set of states. The input of both program is state diagram represented as state table form. The output of error check program is error comment. The output of reduction program is equivalence reduced state table. Both programs are implemented using prolog. Prolog has very powerful pattern matching, and its automatic back-tracking capabilities facilitate easy-to-write error check and reduction programs.

• The Transactions of the Korea Information Processing Society
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• v.1 no.4
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• pp.438-451
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• 1994

A low complexity, fault detecting computer architecture for utilisation in programmable logic controllers is designed. The cyclic operating mode of PLCs and a specification level, graphical programming paradigm based on the interconnection of application oriented standard software function modules are architecturally supported. Thus, by design, there is no semantic gap between the programming and machine execution levels enabling the safety licensing of application software by an extremely simple, but rigorous method, viz, diverse back translation.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.4
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• pp.265-269
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• 2009

Formal specification plays important roles in guaranteeing software safety of safety-critical systems such as nuclear power plant's digital control systems. We had developed a technique [1] which synthesizes Function Block Diagram(FBD) programs from NuSCR formal requirements specifications, but it did not be used widely as it had no automatic tool support. FBD is one of the programming languages for Programmable Logic Controllers(PLC) based system. This paper introduces a CASE tool, NuSCRtoFBD, developed to automate the synthesis procedure. The CASE tool NuSCRtoFBD can reduce a number of errors occurred in the process of manual FBD programming.

• Journal of Institute of Control, Robotics and Systems
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• v.20 no.7
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• pp.741-749
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• 2014

This paper proposes a machine vision module for PLCs (Programmable Logic Controllers). PLC is the industrial controller most widely used in factory automation system. However most of the machine vision systems are based on PC (Personal Computer). The machine vision system embedded in PLC is required to reduce the cost and improve the convenience of implementation. In this paper, we newly propose a machine vision module based on PLC. The image processing libraries are implemented and integrated with the PLC programming tool. In order to interface the libraries with ladder programming, the ladder instruction set was also designed for each vision library. By use of the developed system, PLC users can implement vision systems easily by ladder programming. The developed system was applied to sample inspection system to verify the performance. The experimental results show that the proposed system can reduce the cost of installing as well as increase the ease-of-implementation.

• Proceedings of the KIEE Conference
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• 1996.07b
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• pp.1263-1265
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• 1996

IEC1131-3 Specification of Programming Controller is established in 1994 and consists of 3 graphical languages and 2 textual languages. It is used in PLC and small scale controller because of its uniformity and extensibility. This paper describes Soft Logic Designer which is a graphical and textual programming editor for IEC1131-3 programming languages. Soft Logic Designer is developed with Object Orient Language, C++ under Microsoft Windows 95. It has two graphic editors for Sequential Function Chart and Function Block Diagram and one textual editor for Structured Text. Users can efficiently write high-level programs with mouse and menu buttons.