• IEMEK Journal of Embedded Systems and Applications
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• v.9 no.4
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• pp.205-210
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• 2014

Cache based live migration method utilizes a cache, which is accessible to both side (remote and local), to reduce the virtual machine migration time, by transferring only irredundant data. However, address space layout randomization (ASLR) is proved to reduce the memory duplicate ratio between targeted migration memory and the migration cache. In this pager, we analyzed the behavior of ASLR to find out how it changes the physical memory contents of virtual machines. We found that among six virtual memory regions, only the modification to stack influences the page-level memory duplicate ratio. Experiments showed that: (1) the ASLR does not shift the heap region in sub-page level; (2) the stack reduces the duplicate page size among VMs which performed input replay around 40MB, when ASLR was enabled; (3) the size of memory pages, which can be reconstructed from the fresh booted up state, also reduces by about 60MB by ASLR. With those observations, when applying cache-based migration method, we can omit the stack region. While for other five regions, even a coarse page-level redundancy data detecting method can figure out most of the duplicate memory contents.

• Journal of KIISE:Software and Applications
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• v.35 no.5
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• pp.281-287
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• 2008

Data transfers occur during the execution time of a Java program, from constant to variable, from variable to other variable and so on. Data are located in memory and hence data transfer requires access to memory. As memory access generates both time delay and energy consumption it is absolutely necessary to know the data transfer overheads incurred among different paths not only to write an efficient program but also to build a high-performance Java virtual machine. In this paper we classify Java memory into three different regions, constant, local variable, and field, and then investigate data transfer overheads among these regions. The result says that the transfer between local variables incur the least overhead usually, while the transfer between fields incur the most. The difference of overheads reaches up to a double. Optimization techniques like JIT reduces the data transfer overhead dramatically. It is observed that the overhead is reduced from 14 to 27 times for the case of Hotspot JVM.

• Proceedings of the PSK Conference
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• 2005.11a
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• pp.235-235
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• 2005

• Journal of Computing Science and Engineering
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• v.4 no.3
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• pp.207-224
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• 2010

This paper presents a compression scheme for mesh geometry, which is suitable for mobile graphics. The main focus is to enable real-time decoding of compressed vertex positions while providing reasonable compression ratios. Our scheme is based on local quantization of vertex positions with mesh partitioning. To prevent visual seams along the partitioning boundaries, we constrain the locally quantized cells of all mesh partitions to have the same size and aligned local axes. We propose a mesh partitioning algorithm to minimize the size of locally quantized cells, which relates to the distortion of a restored mesh. Vertex coordinates are stored in main memory and transmitted to graphics hardware for rendering in the quantized form, saving memory space and system bus bandwidth. Decoding operation is combined with model geometry transformation, and the only overhead to restore vertex positions is one matrix multiplication for each mesh partition. In our experiments, a 32-bit floating point vertex coordinate is quantized into an 8-bit integer, which is the smallest data size supported in a mobile graphics library. With this setting, the distortions of the restored meshes are comparable to 11-bit global quantization of vertex coordinates. We also apply the proposed approach to compression of vertex attributes, such as vertex normals and texture coordinates, and show that gains similar to vertex geometry can be obtained through local quantization with mesh partitioning.

• Journal of the Korean BIBLIA Society for library and Information Science
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• v.31 no.2
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• pp.53-70
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• 2020

This study was intended to present the need for building the library as a hub of the community memory preservation which provides the collection, sharing, and curation services of the locality specific historical and local data based on the policy task, namely supporting the collection, preservation, and management system of the community's life memory. To this end, the current status of data collection, management, and operation of institutions serving regional-based materials such as cultural centers and regional archives was grasped, and the cases and status of curation services in libraries were investigated and analyzed. The discussion proposed via the results of the study are as follows. First, to the culture center, external demand has been increased from the aspect of social education including festivals, cultural and art event, cultural and art educational business, art activities business of local residents and managerial business is to be carried out, which makes it difficult for the culture center to manage its businesses. Accordingly, it is necessary to collect and preserve regional various data at the pubic libraries playing various roles including provision of informative services, cultural programs and information sharing places to local residents and provision of services to vulnerable social group. As the existing libraries have a plan to collect data systematically, it is considered that those libraries will smoothly operate the data management through cooperation with existing culture centers and various cultural organizations. Second, it appears that a plan will be needed to set up all the data including the ones owned by libraries, local administrative agencies, individuals and other competent agencies in online database so that they are easily available to the public and always available in the libraries because there are a lot of data which cannot be moved to other place and it is actually difficult to concentrate and set up all the data to those libraries.

• Journal of KIISE
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• v.43 no.3
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• pp.304-313
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• 2016

We present a novel memory-efficient parallel ray casting algorithm for unstructured grid volume rendering on multi-core CPUs. Our method is based on the Bunyk ray casting algorithm. To solve the high memory overhead problem of the Bunyk algorithm, we allocate a fixed size local buffer for each thread and the local buffers contain information of recently visited faces. The stored information is used by other rays or replaced by other face's information. To improve the utilization of local buffers, we propose an image-plane based ray grouping algorithm that makes ray groups have high coherency. The ray groups are then distributed to computing threads and each thread processes the given groups independently. We also propose a novel hash function that uses the index of faces as keys for calculating the buffer index each face will use to store the information. To see the benefits of our method, we applied it to three unstructured grid datasets with different sizes and measured the performance. We found that our method requires just 6% of the memory space compared with the Bunyk algorithm for storing face information. Also it shows compatible performance with the Bunyk algorithm even though it uses less memory. In addition, our method achieves up to 22% higher performance for a large-scale unstructured grid dataset with less memory than Bunyk algorithm. These results show the robustness and efficiency of our method and it demonstrates that our method is suitable to volume rendering for a large-scale unstructured grid dataset.

• IEMEK Journal of Embedded Systems and Applications
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• v.8 no.5
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• pp.255-264
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• 2013

Resolving of memory access latency is one of the most important problems in modern embedded system design. Recently, tons of studies are presented to reduce and hide the access latency. Burst/page data transfer modes are representative hardware techniques for achieving such purpose. The burst data transfer capability offers an average access time reduction of more than 65 percent for an eight-word sequential transfer. However, solution of utilizing such burst data transfer to improve memory performance has not been accomplished at commercial level. Therefore, this paper presents a new technique that provides the maximum utilization of burst transfer for memory accesses with local variables in code by reorganizing variables placement.

• The Journal of Information Systems
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• v.6 no.1
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• pp.159-180
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• 1997

Database sharing system(DBSS) refers to a system for high performance transaction processing. In DBSS, the processing nodes are locally coupled via a high speed network and share a common database at the disk level. Each node has a local memory, a separate copy of operating system, and a DBMS. To reduce the number of disk accesses, the node caches database pages in its local memory buffer. However, since multiple nodes may be simultaneously cached a page, cache consistency must be ensured so that every node can always access the latest version of pages. In this paper, we propose efficient buffer invalidation schemes in DBSS, where the database is logically partitioned using primary copy authority to reduce locking overhead. The proposed schemes can improve performance by reducing the disk access overhead and the message overhead due to maintaining cache consistency. Furthermore, they can show good performance when database workloads are varied dynamically.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.2
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• pp.88-97
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• 1990

In this paper, DPA bus is proposed for implementation of MC 68000 based tightly-coupled multiprocessor system. The DPMC and arbiter are designed that the local memory of each PE can accept memory request both from a local processor and from the system bus. The performance of the proposed system bus is evaluated by Stochastic Petri Net(SPN) system modeling. The processing power, the efficiency, and the utilization of system bus are simulated for various load factors.

• Applied Microscopy
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• v.51
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• pp.7.1-7.9
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• 2021

Neuromorphic systems require integrated structures with high-density memory and selector devices to avoid interference and recognition errors between neighboring memory cells. To improve the performance of a selector device, it is important to understand the characteristics of the switching process. As changes by switching cycle occur at local nanoscale areas, a high-resolution analysis method is needed to investigate this phenomenon. Atomic force microscopy (AFM) is used to analyze the local changes because it offers nanoscale detection with high-resolution capabilities. This review introduces various types of AFM such as conductive AFM (C-AFM), electrostatic force microscopy (EFM), and Kelvin probe force microscopy (KPFM) to study switching behaviors.