• Title/Summary/Keyword: Link-level Simulation

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A channel assignment scheme for reducing call blocking rate in DS-CDMA cellular systems (DS-CDMA 셀룰라 시스템에서 호 차단률 개선을 위한 채널 할당 방식)

  • 전형구;황선호;권수근;강창언
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.5
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    • pp.1075-1082
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    • 1997
  • In this paper, we propose a channel assignment scheme for reducing call blocking rate in a base station(BS) of DS-CDMA cellular systems. The proposed scheme can e applied to the case where the capacity of reverse radio link is enough, but not are the available traffic channels performing the digital modulation and demodulation functions between a mobile station and the base station. The proposed scheme takes advantage of the feature of soft handoff in which a mobile station keeps its communication link even if one of the two communication links is released. The scheme estimates the mean and variance of the received power level measured at the base station before assigning a traffic channel for a new call request. The BS makes decision based on the estimated balues whether the new call request will be accepted or not. If it is decided that the capacity of reverse radio link is enough, but all traffic channels are not available, then the BS increases the soft handoff parameter T_DROP to release the traffic channels of mobile stations loactedin soft handoff area. The BS assigns the released traffic channel to anew call or a handoff call. The performance of the proposed channel assignment scheme is evaluated by computer simulation. The results show that the call blocking rate for new calls and handoff calls is reduced.

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Novel Five-Level Three-Phase Hybrid-Clamped Converter with Reduced Components

  • Chen, Bin;Yao, Wenxi;Lu, Zhengyu
    • Journal of Power Electronics
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    • v.14 no.6
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    • pp.1119-1129
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    • 2014
  • This study proposes a novel five-level three-phase hybrid-clamped converter composed of only six switches and one flying capacitor (FC) per phase. The capacitor-voltage-drift phenomenon of the converter under the classical sinusoidal pulse width modulation (SPWM) strategy is comprehensively analyzed. The average current, which flows into the FC, is a function of power factor and modulation index and does not remain at zero. Thus, a specific modulation strategy based on space vector modulation (SVM) is developed to balance the voltage of DC-link and FCs by injecting a common-mode voltage. This strategy applies the five-segment method to synthesize the voltage vector, such that switching losses are reduced while optional vector sequences are increased. The best vector sequence is then selected on the basis of the minimized cost function to suppress the divergence of the capacitor voltage. This study further proposes a startup method that charges the DC-link and FCs without any additional circuits. Simulation and experimental results verify the validity of the proposed converter, modulation strategy, and precharge method.

Design of Chip Set for CDMA Mobile Station

  • Yeon, Kwang-Il;Yoo, Ha-Young;Kim, Kyung-Soo
    • ETRI Journal
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    • v.19 no.3
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    • pp.228-241
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    • 1997
  • In this paper, we present a design of modem and vocoder digital signal processor (DSP) chips for CDMA mobile station. The modem chip integrates CDMA reverse link modulator, CDMA forward link demodulator and Viterbi decoder. This chip contains 89,000 gates and 29 kbit RAMs, and the chip size is $10 mm{\times}10.1 mm$ which is fabricated using a $0.8{\mu}m$ 2 metal CMOs technology. To carry out the system-level simulation, models of the base station modulator, the fading channel, the automatic gain control loop, and the microcontroller were developed and interfaced with a gate-level description of the modem application specific integrated circuit (ASIC). The Modem chip is now successfully working in the real CDMA mobile station on its first fab-out. A new DSP architecture was designed to implement the Qualcomm code exited linear prediction (QCELP) vocoder algorithm in an efficient way. The 16 bit vocoder DSP chip has an architecture which supports direct and immediate addressing modes in one instruction cycle, combined with a RISC-type instruction set. This turns out to be effective for the implementation of vocoder algorithm in terms of performance and power consumption. The implementation of QCELP algorithm in our DSP requires only 28 million instruction per second (MIPS) of computation and 290 mW of power consumption. The DSP chip contains 32,000 gates, 32K ($2k{\times}16\;bit$) RAM, and 240k ($10k{\times}24\;bit$) ROM. The die size is $8.7\;mm{\times}8.3\;mm$ and chip is fabricated using $0.8\;{\mu}m$ CMOS technology.

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Application of 3GPP LTE and IEEE 802.11p Systems to Ship Ad-Hoc Network with the Existence of ISI

  • Su, Xin;Hui, Bing;Chang, KyungHi;Jin, Gwangja
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.37A no.12
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    • pp.1106-1114
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    • 2012
  • In order to provide high data rate and real time services under maritime environment, link-level performance of ship ad-hoc network (SANET) based on 3GPP LTE and IEEE 802.11p (WAVE) specifications are investigated and discussed in this paper. The measured maritime channel, whose delay spread is longer than the length of guard interval (GI) of both 3GPP LTE and IEEE 802.11p specifications, is adopted for the link-level simulations. For the purpose of eliminating inter-symbol interference (ISI) due to insufficient GI length, double antenna pattern (DAP) scheme and advanced time-domain decision-feedback equalizer (DFE) are proposed for LTE and WAVE systems, respectively. The proposed DFE removes the ISI in a same manner as the residual inter-symbol interference cancellation (RISIC) algorithm, but the inter-carrier interference (ICI) is reduced via cyclicity removal instead of cyclicity restoration used in the RISIC algorithm. Compared with existing schemes, our proposed DFE is a robust technique to overcome the severe ISI channel which has a comparatively large delay spread. Based on simulation results, not only comparisons between systems are discussed, but also some reformative suggestions are given.

Common-Mode Voltage Elimination with an Auxiliary Half-Bridge Circuit for Five-Level Active NPC Inverters

  • Le, Quoc Anh;Park, Do-Hyeon;Lee, Dong-Choon
    • Journal of Power Electronics
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    • v.17 no.4
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    • pp.923-932
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    • 2017
  • This paper proposes a novel scheme which can compensate the common-mode voltage (CMV) for five-level active neutralpoint clamped (5L-ANPC) inverters, which is based on modifying the space vector pulse width modulation (SVPWM) and adding an auxiliary leg to the inverter. For the modified SVPWM, only the 55 voltage vectors producing low CMV values among the 125 possible voltage vectors are utilized, which varies over the three voltage levels of $-V_{dc}/12$, 0 V, and $V_{dc}/12$. In addition, the compensating voltage, which is injected into the 5L-ANPC inverter system to cancel the remaining CVM through a common-mode transformer (CMT) is generated by the additional NPC leg. By the proposed method, the CMV of the inverter is fully eliminated, while the utilization of the DC-link voltage is not decreased at all. Furthermore, all of the DC-link and flying capacitor voltages of the inverter are well controlled. Simulation and experimental results have verified the validity of the proposed scheme.

Heterogeneous Network Gateway Architecture and Simulation for Tactical MANET (전술 에드혹 환경에서 이종망 게이트웨이 구조 및 시뮬레이션 연구)

  • Roh, Bong Soo;Han, Myoung Hun;Kwon, Dae Hoon;Ham, Jae Hyun;Yun, Seon Hui;Ha, Jae Kyoung;Kim, Ki Il
    • Journal of the Korea Society for Simulation
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    • v.28 no.2
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    • pp.97-105
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    • 2019
  • The tactical mobile ad-hoc network(MANET) consists of distributed autonomous networks between individual ground nodes, which is effective in terms of network survivability and flexibility. However, due to constraints such as limited power, terrain, and mobility, frequent link disconnection and shadow area may occur in communication. On the other hand, the satellite network has the advantage of providing a wide-area wireless link overcoming terrain and mobility, but has limited bandwidth and high-latency characteristic. In the future battlefield, an integrated network architecture for interworking multi-layer networks through a heterogeneous network gateway (HNG) is required to overcome the limitations of the existing individual networks and increase reliability and efficiency of communication. In this paper, we propose a new HNG architecture and detailed algorithm that integrates satellite network and the tactical MANET and enables reliable data transfer based on flow characteristics of traffic. The simulations validated the proposed architecture using Riverbed Modeler, a network-level simulator.

Cascaded H-Bridge Five Level Inverter for Grid Connected PV System using PID Controller

  • Sivagamasundari, M.S.;Mary, P. Melba
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.4
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    • pp.451-462
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    • 2016
  • Photovoltaic energy conversion becomes main focus of many researches due to its promising potential as source for future electricity and has many advantages than the other alternative energy sources like wind, solar, ocean, biomass, geothermal etc. In Photovoltaic power generation multilevel inverters play a vital role in power conversion. The three different topologies, diode-clamped (neutral-point clamped) inverter, capacitor-clamped (flying capacitor) inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each pv array can act as a separate dc source for each h-bridge module. This paper presents a single phase Cascaded H-bridge five level inverter for grid-connected photovoltaic application using sinusoidal pulse width modulation technique. This inverter output voltage waveform reduces the harmonics in the generated current and the filtering effort at the input. The control strategy allows the independent control of each dc-link voltages and tracks the maximum power point of PV strings. This topology can inject to the grid sinusoidal input currents with unity power factor and achieves low harmonic distortion. A PID control algorithm is implemented in Arm Processor LPC2148. The validity of the proposed inverter is verified through simulation and is implemented in a single phase 100W prototype. The results of hardware are compared with simulation results. The proposed system offers improved performance over conventional three level inverter in terms of THD.

System-Level Performance of Spread Spectrum-Based Add-on Service Overlaid onto the Existing Terrestrial Digital Multimedia Broadcast Band

  • Yoon, Seokhyun;Lim, Bo-Mi;Lee, Yong Tae
    • ETRI Journal
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    • v.34 no.4
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    • pp.492-502
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    • 2012
  • We consider an overlaid broadcast service, where a spread spectrum (SS)-based broadcast signal is overlaid onto the existing terrestrial Digital Multimedia Broadcasting (T-DMB) band. The system is similar to the augmented data transmission in the ATSC DTV, for which it was investigated mostly in terms of link level performance, such as bit error rate. Our focus in this paper is on the system-level performances. More specifically, utilizing both a large scale path loss and a small scale fading channel model, the primary objective is to explore the tradeoff between the coverage and the achievable rate of the overlaid service and, finally, to determine the achievable rate in the overlaid service for marginal coverage reduction in the existing broadcast service. The analytical and simulation results show that an SS-based add-on service of 10 kbps to 20 kbps can co-exist with the T-DMB service while resulting in only a marginal degradation in T-DMB coverage (for example, less than one percent reduction).

Optimization of Link-level Performance and Complexity for the Floating-point and Fixed-point Designs of IEEE 802.16e OFDMA/TDD Mobile Modem (IEEE 802.16e OFDMA/TDD 이동국 모뎀의 링크 성능과 복잡도 최적화를 위한 부동 및 고정 소수점 설계)

  • Sun, Tae-Hyoung;Kang, Seung-Won;Kim, Kyu-Hyun;Chang, Kyung-Hi
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.11 s.353
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    • pp.95-117
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    • 2006
  • In this paper, we describe the optimization of the link-level performance and the complexity of floating-point and fixed-point methods in IEEE 802.16e OFDMA/TDD mobile modem. In floating-point design, we propose the channel estimation methods for downlink traffic channel and select the optimized method using computer simulation. So we also propose efficent algorithms for time and frequency synchronization, Digital Front End and CINR estimation scheme to optimize the system performance. Furthermore, we describe fixed-point method of uplink traffic and control channels. The superiority of the proposed algorithm is validated using the performances of Detection, False Alarm, Missing Probability and Mean Acquisition Time, PER Curve, etc. For fixed-point design, we propose an efficient methodology for optimized fixed-point design from floating-point At last, we design fixed-point of traffic channel, time and frequency synchronization, DFE block in uplink and downlink. The tradeoff between performance and complexity are optimized through computer simulations.

Performance Evaluation of a Pilot Interference Cancellation Scheme in a WCDMA Wireless Repeater (WCDMA 무선 중계기에서 파일럿 간섭제거 기법의 성능평가)

  • Kim, Sun-Ho;Shim, Hee-Sung;Im, Sung-Bin
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.46 no.6
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    • pp.111-117
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    • 2009
  • In the wideband code division access (WCDMA) systems, a pilot channel is used to determine WCDMA network coverage, cell identification, synchronization, timing acquisition and tracking, user-set handoff, channel estimation, and so on. A wireless repeater, which is deployed in the urban area for the WCDMA system to meet the growing demand on wireless communication services, has the possibility to receive several pilot signals from a large number of base stations, however, cannot distinguish its service base station's signal among them. This pilot interference results in frequent handoffs in the user equipment, which degrades the radio reception, transmission efficiency, quality of service, and channel capacity and increases the unwanted power consumption. In this paper, thus, we propose a pilot pollution interference cancellation scheme using one of the adaptive estimation algorithms, normalized least mean square (NLMS), which is applicable to a wireless repeater. We carried out link-level and network-level computer simulations to evaluate the performance of the proposed scheme in a wireless repeater. The simulation results verify the bit error rate (BER) improvement in the link level and the call drop probability improvement in the network level.