• The Transactions of the Korean Institute of Power Electronics
• /
• v.27 no.3
• /
• pp.180-191
• /
• 2022

In this paper, a single-stage alternating current (AC)-DC converter is proposed for the automated-guided vehicle wireless charging system. The proposed converter is capable of soft-switching under all input voltage (VAC: 220 Vrms ± 10%), load conditions (0-1 kW), and air gap changes (40-60 mm) by phase control at a fixed switching frequency. In addition, controlling a wide output voltage (Vo: 39~54 VDC) is possible by varying the link voltage and improving the input power factor and the total harmonic distortion factor. Experimental results were verified by making a prototype of a 1-kW wireless power charging system that operates with robustness to changes in air gaps.

• 제어로봇시스템학회:학술대회논문집
• /
• 2004.08a
• /
• pp.772-776
• /
• 2004

This paper proposes an interference avoidance approach for Constraint-Based Routing (CBR) algorithm in the Multi-Protocol Label Switching (MPLS) network. The MPLS network itself has a capability of integrating among any layer-3 protocols and any layer-2 protocols of the OSI model. It is based on the label switching technology, which is fast and flexible switching technique using pre-defined Label Switching Paths (LSPs). The MPLS network is a solution for the Traffic Engineering(TE), Quality of Service (QoS), Virtual Private Network (VPN), and Constraint-Based Routing (CBR) issues. According to the MPLS CBR, routing performance requirements are capability for on-line routing, high network throughput, high network utilization, high network scalability, fast rerouting performance, low percentage of call-setup request blocking, and low calculation complexity. There are many previously proposed algorithms such as minimum hop (MH) algorithm, widest shortest path (WSP) algorithm, and minimum interference routing algorithm (MIRA). The MIRA algorithm is currently seemed to be the best solution for the MPLS routing problem in case of selecting a path with minimum interference level. It achieves lower call-setup request blocking, lower interference level, higher network utilization and higher network throughput. However, it suffers from routing calculation complexity which makes it difficult to real task implementation. In this paper, there are three objectives for routing algorithm design, which are minimizing interference levels with other source-destination node pairs, minimizing resource usage by selecting a minimum hop path first, and reducing calculation complexity. The proposed CBR algorithm is based on power factor calculation of total amount of possible path per link and the residual bandwidth in the network. A path with high power factor should be considered as minimum interference path and should be selected for path setup. With the proposed algorithm, all of the three objectives are attained and the approach of selection of a high power factor path could minimize interference level among all source-destination node pairs. The approach of selection of a shortest path from many equal power factor paths approach could minimize the usage of network resource. Then the network has higher resource reservation for future call-setup request. Moreover, the calculation of possible path per link (or interference level indicator) is run only whenever the network topology has been changed. Hence, this approach could reduce routing calculation complexity. The simulation results show that the proposed algorithm has good performance over high network utilization, low call-setup blocking percentage and low routing computation complexity.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.47 no.1
• /
• pp.58-68
• /
• 2010

In this paper, we propose an efficient link protection switching scheme for provider backbone bridge systems with a spanning tree for backup links exclusively, and evaluate its performance. The proposed scheme offers guaranteed QoS flows even when a link fault occurrs in the primary link by flooding the flows over the profiled spanning tree. The flooding mechanism over the spanning tree can also provide low latency and remove the loopback flows. We also derive the efficiency of bandwidth usage for the normal flows and the number of lost frames during the link restoration. For evaluating its feasibility, we implement a prototype of PBB-TE systems based on the Linux bridge codes, which can support both link protection switching capability with CCM and MAC-in-MAC encapsulation. A related protocol analyzer is also developed. One can see that the proposed scheme and the prototype can be useful for developing carrier class Ethernet systems based on PBB-TE.

• Journal of Power Electronics
• /
• v.5 no.3
• /
• pp.233-239
• /
• 2005

In this paper, a new conceptual circuit configuration of a 3-phase voltage source, soft switching AC-DC-AC converter using an IGBT module, which has one ARCPL circuit and one ARDCL circuit, is presented. In actuality, the ARCPL circuit is applied in the 3-phase voltage source rectifier side, and the ARDCL circuit is in the inverter side. And more, each power semiconductor device has a novel clamp snubber circuit, which can save the power semiconductor device from voltage and current across each power device. The proposed soft switching circuits have only two active power semiconductor devices. These ARCPL and ARDCL circuits consist of fewer parts than the conventional soft switching circuit. Furthermore, the proposed 3-phase voltage source soft switching AC-DC-AC power conversion system needs no additional sensor for complete soft switching as compared with the conventional 3-phase voltage source AC-DC-AC power conversion system. In addition to this, these soft switching circuits operate only once in one sampling term. Therefore, the power conversion efficiency of the proposed AC-DC-AC converter system will get higher than a conventional soft switching converter system because of the reduced ARCPL and ARDCL circuit losses. The operation timing and terms for ARDCL and ARCPL circuits are calculated and controlled by the smoothing DC capacitor voltage and the output AC current. Using this control, the loss of the soft switching circuits are reduced owing to reduced resonant inductor current in ARCPL and ARDCL circuits as compared with the conventional controlled soft switching power conversion system. The operating performances of proposed soft switching AC-DC-AC converter treated here are evaluated on the basis of experimental results in a 50kVA setup in this paper. As a result of experiment on the 50kVA system, it was confirmed that the proposed circuit could reduce conduction noise below 10 MHz and improve the conversion efficiency from 88. 5% to 90.5%, when compared with the hard switching circuit.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.2 no.2
• /
• pp.8-18
• /
• 1997

In this paper, a New Low Loss Quasi-Parallel Resonant DC-Link(NLQPRDCL) Inverter which shows highly improved PWM capability, low loss characteristic and low voltage stress is presented. A method to minimize freewheeling interval, which is able to largely decrease DC-link operation losses and to steadily guarantee soft switching in the wide operation region is also proposed. In addition, lossless control of zero voltage duration of DC-link makes the proposed inverter maintain the advanced PWM capability even under a very low modulation index. Experiment and simulation were performed to verify validity of the proposed inverter topology.

• ETRI Journal
• /
• v.27 no.6
• /
• pp.733-746
• /
• 2005

In the context of multi-protocol label switching (MPLS) traffic engineering, this paper proposes a scalable constraintbased shortest path first (CSPF) routing algorithm with multiple QoS metrics. This algorithm, called the multiple constraint-based shortest path first (M_CSPF) algorithm, provides an optimal route for setting up a label switched path (LSP) that meets bandwidth and end-to-end delay constraints. In order to maximize the LSP accommodation probability, we propose a link weight computation algorithm to assign the link weight while taking into account the future traffic load and link interference and adopting the concept of a critical link from the minimum interference routing algorithm. In addition, we propose a bounded order assignment algorithm (BOAA) that assigns the appropriate order to the node and link, taking into account the delay constraint and hop count. In particular, BOAA is designed to achieve fast LSP route computation by pruning any portion of the network topology that exceeds the end-to-end delay constraint in the process of traversing the network topology. To clarify the M_CSPF and the existing CSPF routing algorithms, this paper evaluates them from the perspectives of network resource utilization efficiency, end-to-end quality, LSP rejection probability, and LSP route computation performance under various network topologies and conditions.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.6 no.1
• /
• pp.30-35
• /
• 2002

Dynamic routing uses routing protocols to select the best routes and to update the routing table. RP (Routing Information Protocol)using a distance-vector algorithm becomes generally known a routing protocol on the network. RIP selects the route with the lowest "hop count" (metric) as the best route. but RIP has a serious shortcoming. a mP router cannot maintain a complete routing table for a network that has destinations more than 15 hops away. To overcome this defect, It uses the OSPF (Open Shortest Path First) of link -state protocols developed for TCP/IP. It is suitable for very large networks and provides several advantages over RIP. This paper analyzes the traffic and the link efficiency between two protocols such as message delivery and delay, link utilization, message counts on the same network.e network.

• Journal of Power Electronics
• /
• v.15 no.2
• /
• pp.411-418
• /
• 2015

In this paper, a new method for the online estimation of equivalent series resistances (ESR) of the DC-link capacitors in induction machine (IM) drive systems with a front-end diode rectifier is proposed, where the ESR estimation is conducted during the regenerative operating mode of the induction machine. In the first place, a regulated AC current component is injected into the q-axis current component of the induction machine, which induces the current and voltage ripple components in the DC-link. By processing these AC signals through digital filters, the ESR can be estimated by a recursive least squares (RLS) algorithm. To acquire the AC voltage across the ESR, the DC-link voltage needs to be measured at a double sampling frequency. In addition, the ESR current is simply reconstructed from the stator currents and switching states of the inverter. Experimental results have shown that the estimation error of the ESR is about 1.2%, which is quite acceptable for condition monitoring of the capacitor.

• Journal of Digital Contents Society
• /
• v.3 no.2
• /
• pp.143-152
• /
• 2002

In this paper, we present the general interface, label-switched path structure and link bundling in GMPLS to improve the scalability. The LMP protocol is also introduced to efficiently manage the internal link, and the signaling protocol, hierarchical path setup, hi-directional LSP setup and suggested label method are presented. Finally, the techniques of protection and restoration are presented. In specific, various applicable restoration techniques in GMPLS are discussed.

• Proceedings of the KIEE Conference
• /
• 1993.11a
• /
• pp.117-120
• /
• 1993

In this paper, a novel DC link voltage control scheme for a single-phase PWM converter is proposed. The main idea of the control scheme is eliminating the effect of dc link voltage harmonics by using power balance of input side and output side. With the proposed strategy, faster transient response than that of conventional method using low-pass filter can be obtained. In addition, a half period current control, based at equal switching frequency, is proposed. The validity of the proposed scheme is verified by simulation results for GTO PWM converter system.