• The Transactions of the Korean Institute of Electrical Engineers P
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• 제66권4호
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• pp.213-218
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• 2017

The DC electrolytic capacitor for DC-link of power converter is widely used in various power electronic circuits and system application. Its functions include, DC Bus voltage stabilization, conduction of ripple current due to switching events, voltage smoothing, etc. Unfortunately, DC electrolytic capacitors are some of the weakest components in power electronics converters. Many papers have proposed different algorithms or diagnosis method to determinate the ESR and tan ${\delta}$ capacitance C for fault alarm system of the electrolytic capacitor. However, both ESR vary with frequency and temperature. Accurate knowledge of both parameters at the capacitors operating conditions is essential to achieve the best reference data of fault alarm. According to parameter analysis, the capacitance increases with temperature and the initial ESR decreases. Higher frequencies make the reference ESR with the initial ESRo value to decrease. Analysis results show that the proposed DC Bus electrolytic capacitor reference ESR model setting technique can be applied to advanced reference signal of capacitor diagnosis systems successfully.

• Journal of Power Electronics
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• 제14권6호
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• pp.1119-1129
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• 2014

This study proposes a novel five-level three-phase hybrid-clamped converter composed of only six switches and one flying capacitor (FC) per phase. The capacitor-voltage-drift phenomenon of the converter under the classical sinusoidal pulse width modulation (SPWM) strategy is comprehensively analyzed. The average current, which flows into the FC, is a function of power factor and modulation index and does not remain at zero. Thus, a specific modulation strategy based on space vector modulation (SVM) is developed to balance the voltage of DC-link and FCs by injecting a common-mode voltage. This strategy applies the five-segment method to synthesize the voltage vector, such that switching losses are reduced while optional vector sequences are increased. The best vector sequence is then selected on the basis of the minimized cost function to suppress the divergence of the capacitor voltage. This study further proposes a startup method that charges the DC-link and FCs without any additional circuits. Simulation and experimental results verify the validity of the proposed converter, modulation strategy, and precharge method.

• Journal of Electrical Engineering and Technology
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• 제8권4호
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• pp.808-812
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• 2013

Multilayer capacitors with high ripple current and high capacitance were manufactured. The electrical properties of these capacitors were characterized for potential application for DC-link capacitors in hybrid electric vehicle inverters. Internal electrode structures were designed to achieve high capacitance and reliability. A single multilayer capacitor showed $0.46{\mu}F/cm^3$ of capacitance, 0.65% of dielectric loss, and 1450 V to 1650 V of dielectric breakdown voltage depending on the design of the internal electrode. The capacitor module designed with several multilayer capacitors gave a total capacitance of $450{\mu}F$, which is enough for hybrid electric vehicles. In particular, an equivalent series resistance of $4.5m{\Omega}$ or less will result in 60 $A_{rms}$, thereby reaching the allowed ripple current for hybrid electric vehicles.

• Journal of Power Electronics
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• 제17권3호
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• pp.653-663
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• 2017

Multilevel active neutral-point-clamped (ANPC) converter combines the advantages of three-level ANPC converter and multilevel flying capacitor (FC) converter. However, multilevel ANPC converter often suffers from capacitor voltage balancing problems. In order to solve the capacitor voltage balancing problems for five-level ANPC converter, phase-shifted pulse width modulation (PS-PWM) is used, which generally provides natural voltage balancing ability. However, the natural voltage balancing ability depends on the load conditions and converter parameters. In order to eliminate voltage deviations under steady-state and dynamic conditions, the active voltage-balancing control (AVBC) methods of floating capacitors and dc-link capacitors based on PS-PWM are proposed. First, the neutral-point current is regulated to balance the neutral-point voltage by injecting zero-sequence voltage. After that, the duty cycles of the redundant switch combinations are adjusted to balance the floating-capacitor voltages by introducing moderating variables for each of the phases. Finally, the effectiveness of the proposed AVBC methods is verified by experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• 제8권3호
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• pp.274-284
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• 2003

Multi-level converter that is high-capacity electric power conversion system is used widely to electric motor drive system and FATCs(Flexible AC Transmission Systems). H-Bridge converter has been prevalently applied to shunt-type system because it can be easily expanded to the multi-level. In steady states, converter is normally operated in the range of 0.7∼0.8 of modulation Index. Even though zero vectors are not imposed to high modulation index, DC-Link voltage Is constant. It means that converter has another boost vector except for zero vectors among several vectors in 3-level converter. This paper has examined the principle of boost vector and investigated the difference between another boost vector and zero vectors in 3-level converter. In addition, this paper has analysed and compared the charging currents and the capacitor voltages of two topologies. The currents and voltages are related to reference voltage. Therefore, it proposed the calculation method for the voltage ripple and the charging current of each capacitor and compared various DC-Link voltage control methods through the simulation.

• Proceedings of the KIEE Conference
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• 대한전기학회 2008년도 제39회 하계학술대회
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• pp.879-880
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• 2008

At the high speed operation, the boost negative bias can reduce the negative torque and increase the dwell angle, so the output power and efficiency can be improved. In this paper, a novel power converter for single phase SRM with boost negative bias is proposed. A simple passive capacitor circuit is added in the front-end, which consists of three diodes and one capacitor. Based on this passive capacitor network, the two capacitors can be connected in series and parallel in different condition. In proposed converter, the phase winding of SRM obtains general dc-link voltage in excitation mode and the double dc-link voltage in demagnetization mode. The operation modes of the proposed converter are analyzed in detail. Some computer simulation and experimental results are done to verify the performance of proposed converter.

• Proceedings of the KIPE Conference
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• 전력전자학회 2002년도 전력전자학술대회 논문집
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• pp.489-493
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• 2002

This paper discover another boost vectors in high modulation index In steady states, modulation index of converter operation is normally $0.7\~0.8[p.u]$. Even though zero vectors are not imposed, DC-Link voltage is constant because 3-level boost convert has another boost vectors. and this paper proposes the analysis and the comparison for NPC and H-Bridge converter. It proposed the calculation method for the voltage ripple and charging current of each capacitor and deals with voltage balance problems of each link capacitor they are associated with the switching state, the position of reference voltage vector. Simulation and analysis are used in order to prove validity of the proposed methods.

• Proceedings of the KIPE Conference
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.301-303
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• 2001

In this paper we present a Capacitor Charging Power Supply (CCPS) using a series-resonant three-level inverter topology to improve voltage regulation and use semiconductor switches having low blocking voltage capability such as MOSFETs. This inverter can be operated with two modes, Full Power Mode (FPM) and Half Power Mode (HPM). In FPM inverter supplies the high frequency step up transformer with full DC-link voltage and in HPM with half DC-link voltage. HPM switching method will be adopted when CCPS output voltage reaches the preset target value and operates in refresh mode-charge is maintained on the capacitor. In this topology each semiconductor devices blocks a half of the DC-link voltage[2]. A 15kW, 30kV CCPS has been built and will be tested for an electric precipitator application. The CCPS operates from an input voltage of 500VDC and has a variable output voltage between 10 to 30kV and 1kHz repetition rate at 44nF capacitive load [3]. A resonant frequency of 67.9kHz was selected and a voltage regulation of $0.83\%$ has been achieved through the use of half power mode without using the forced cut off the switch current [1]. The theory of operation, circuit topology and test results are given.

• The Transactions of the Korean Institute of Power Electronics
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• 제22권4호
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• pp.277-284
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• 2017

For passive power factor correction, the valley fill circuit approach is attractive for low power applications because of low cost, high efficiency, and simple circuit design. However, to vouch for the product quality, two dc-link capacitors in the valley fill circuit should be selected to withstand the peak rectified ac input voltage. The common mode (CM) and differential mode (DM) choke should be used to suppress the electromagnetic interference (EMI) noise, thereby resulting in large size volume product. This paper presents the practical design and implementation of a valley fill flyback converter with reduced dc link capacitors and EMI magnetic volumes. By using the proposed over voltage protection circuit, dc-link capacitors in the valley fill circuit can be selected to withstand half the peak rectified ac input voltage, and the proposed CM/DM choke can be successfully adopted. The proposed circuit effectiveness is shown by simulation and experimentally verified by a 78W prototype.

• The Transactions of the Korean Institute of Electrical Engineers P
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• 제52권2호
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• pp.49-55
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• 2003

This paper presents a novel three-phase current-fed Pulse Width Modulation converter with switched capacitor type resonant DC link commutation circuit operating PWM pattern strategy under a design consideration of low-pass filter, which can operate on the basis of the principle of zero current soft switching commutation. In the first place, the steady state operating principle of this converter with a new resonant DC link snubber circuit is described in connection with the equivalent operation circuit, together with the practical design procedure of the switched-capacitor type resonant DC link circuit is discussed from a theoretical viewpoint on the basis of a design example for high-power applications. The actively delayed time correction method to compensate distorted currents due to a relatively long resonant commutation time is newly implemented in the open loop control scheme so as to acquire the new optimum PWM pattern. Finally, the experiment of set-up in laboratory system of this converter is concretely demonstrated herein to confirm a zero current soft-switching commutation of this converter. The comparative evaluations between current-fed hard switching PWM and soft-switching PWM converters are carried out from a viewpoint of their PWM converter characteristics.