• Title/Summary/Keyword: Linear Time Complexity

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Fixed Homography-Based Real-Time SW/HW Image Stitching Engine for Motor Vehicles

  • Suk, Jung-Hee;Lyuh, Chun-Gi;Yoon, Sanghoon;Roh, Tae Moon
    • ETRI Journal
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    • v.37 no.6
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    • pp.1143-1153
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    • 2015
  • In this paper, we propose an efficient architecture for a real-time image stitching engine for vision SoCs found in motor vehicles. To enlarge the obstacle-detection distance and area for safety, we adopt panoramic images from multiple telegraphic cameras. We propose a stitching method based on a fixed homography that is educed from the initial frame of a video sequence and is used to warp all input images without regeneration. Because the fixed homography is generated only once at the initial state, we can calculate it using SW to reduce HW costs. The proposed warping HW engine is based on a linear transform of the pixel positions of warped images and can reduce the computational complexity by 90% or more as compared to a conventional method. A dual-core SW/HW image stitching engine is applied to stitching input frames in parallel to improve the performance by 70% or more as compared to a single-core engine operation. In addition, a dual-core structure is used to detect a failure in state machines using rock-step logic to satisfy the ISO26262 standard. The dual-core SW/HW image stitching engine is fabricated in SoC with 254,968 gate counts using Global Foundry's 65 nm CMOS process. The single-core engine can make panoramic images from three YCbCr 4:2:0 formatted VGA images at 44 frames per second and frequency of 200 MHz without an LCD display.

Time Series Data Analysis using WaveNet and Walk Forward Validation (WaveNet과 Work Forward Validation을 활용한 시계열 데이터 분석)

  • Yoon, Hyoup-Sang
    • Journal of the Korea Society for Simulation
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    • v.30 no.4
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    • pp.1-8
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    • 2021
  • Deep learning is one of the most widely accepted methods for the forecasting of time series data which have the complexity and non-linear behavior. In this paper, we investigate the modification of a state-of-art WaveNet deep learning architecture and walk forward validation (WFV) in order to forecast electric power consumption data 24-hour-ahead. WaveNet originally designed for raw audio uses 1D dilated causal convolution for long-term information. First of all, we propose a modified version of WaveNet which activates real numbers instead of coded integers. Second, this paper provides with the training process with tuning of major hyper-parameters (i.e., input length, batch size, number of WaveNet blocks, dilation rates, and learning rate scheduler). Finally, performance evaluation results show that the prediction methodology based on WFV performs better than on the traditional holdout validation.

Enhancing Retrieval Performance for Hierarchical Compact Binary Tree (계층형 집약 이진 트리의 검색 성능 개선)

  • Kim, Sung Wan
    • Journal of Creative Information Culture
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    • v.5 no.3
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    • pp.345-353
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    • 2019
  • Several studies have been proposed to improve storage space efficiency by expressing binary trie data structure as a linear binary bit string. Compact binary tree approach generated using one binary trie increases the key search time significantly as the binary bit string becomes very long as the size of the input key set increases. In order to reduce the key search range, a hierarchical compact binary tree technique that hierarchically expresses several small binary compact trees has been proposed. The search time increases proportionally with the number and length of binary bit streams. In this paper, we generate several binary compact trees represented by full binary tries hierarchically. The search performance is improved by allowing a path for the binary bit string corresponding to the search range to be determined through simple numeric conversion. Through the performance evaluation using the worst time and space complexity calculation, the proposed method showed the highest performance for retrieval and key insertion or deletion. In terms of space usage, the proposed method requires about 67% ~ 68% of space compared to the existing methods, showing the best space efficiency.

Design of a High-Speed Data Packet Allocation Circuit for Network-on-Chip (NoC 용 고속 데이터 패킷 할당 회로 설계)

  • Kim, Jeonghyun;Lee, Jaesung
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2022.10a
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    • pp.459-461
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    • 2022
  • One of the big differences between Network-on-Chip (NoC) and the existing parallel processing system based on an off-chip network is that data packet routing is performed using a centralized control scheme. In such an environment, the best-effort packet routing problem becomes a real-time assignment problem in which data packet arriving time and processing time is the cost. In this paper, the Hungarian algorithm, a representative computational complexity reduction algorithm for the linear algebraic equation of the allocation problem, is implemented in the form of a hardware accelerator. As a result of logic synthesis using the TSMC 0.18um standard cell library, the area of the circuit designed through case analysis for the cost distribution is reduced by about 16% and the propagation delay of it is reduced by about 52%, compared to the circuit implementing the original operation sequence of the Hungarian algorithm.

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A Power Analysis Attack Countermeasure Not Using Masked Table for S-box of AES, ARIA and SEED (마스킹 테이블을 사용하지 않는 AES, ARIA, SEED S-box의 전력 분석 대응 기법)

  • Han, Dong-Guk;Kim, Hee-Seok;Song, Ho-Geun;Lee, Ho-Sang;Hong, Seok-Hie
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.21 no.2
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    • pp.149-156
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    • 2011
  • In the recent years, power analysis attacks were widely investigated, and so various countermeasures have been proposed. In the case of block ciphers, masking methods that blind the intermediate values in the en/decryption computations are well-known among these countermeasures. But the cost of non-linear part is extremely high in the masking method of block cipher, and so the countermeasure for S-box must be efficiently constructed in the case of AES, ARIA and SEED. Existing countermeasures for S-box use the masked S-box table to require 256 bytes RAM corresponding to one S-box. But, the usage of the these countermeasures is not adequate in the lightweight security devices having the small size of RAM. In this paper, we propose the new countermeasure not using the masked S-box table to make up for this weak point. Also, the new countermeasure reduces time-complexity as well as the usage of RAM because this does not consume the time for generating masked S-box table.

Algorithm for Minimum Degree Inter-vertex Edge Selection of Maximum Matching Problem (최대 매칭 문제의 최소차수 정점 간 간선 선택 알고리즘)

  • Lee, Sang-Un
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.22 no.5
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    • pp.1-6
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    • 2022
  • This paper deals with the maximum cardinality matching(MCM) problem. The augmenting path technique is well known in MCM. MCM is obtained by $O({\sqrt{n}}m)$ time complexity augmenting path algorithm for the general graph, and O(m log n) algorithm for the bipartite graph. On the other hand, this paper suggests O(n) linear time algorithm. The proposed algorithm based on the basic principle of as possible as largest selected inter-vertex edges in order to obtain the MCM. This paper simply selects edge {u,𝜐} that the minimum degree vertex u and minimum degree vertex 𝜐 in NG(u) 𝜈(G)=k times iteration. For various general and bipartite graphs experimental data, this algorithm can be get the 𝜈(G) exactly.

Algorithm for Cross-avoidance Bypass Routing in Numberlink Puzzle (숫자 연결 퍼즐에 관한 교차 회피 우회 경로 알고리즘)

  • Sang-Un Lee
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.24 no.3
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    • pp.95-101
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    • 2024
  • The numberlink puzzle(NLP), which non-crossings with other numbers of connection in connecting lines through empty cells between a given pair of numbers, is an NP-complete problem with no known way to solve the puzzle in polynomial time. Until now, arbitrary numbers have been selected and puzzles have been solved using trial-and-error methods. This paper converts empty cells into vertices in lattice graphs connected by edge between adjacent cells for a given problem. Next, a straight line was drawn between the pairs of numbers and divided into groups of numbers where crossing occurred. A bypass route was established to avoid intersection in the cross-number group. Applying the proposed algorithm to 18 benchmarking data showed that the puzzle could be solved with a linear time complexity of O(n) for all data.

Noise Whitening Decision Feedback Equalizer for SC-FDMA Receivers (SC-FDMA 수신기를 위한 잡음 백색화 판정궤환 등화기)

  • Lee, Su-Kyoung;Park, Yong-Hyun;Seo, Bo-Seok
    • Journal of Broadcast Engineering
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    • v.16 no.6
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    • pp.986-995
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    • 2011
  • In this paper, we propose a noise whitening decision feedback equalizer for single carrier frequency division multiple access (SC-FDMA) receivers. SC-FDMA has the same advantage as that of orthogonal frequency division multiple access (OFDMA) in which the multipath effect can be removed easily, and also solves the problem of high peak to average power ratio (PAPR) which is the main drawback of OFDMA. Although SC-FDMA is a single carrier transmission scheme, a simple frequency domain linear equalizer (FD-LE) can be implemented as in OFDMA, which can dramatically reduce the equalizer complexity. Moreover, some residual intersymbol interference in the output of the FD-LE can be further removed by an additional nonlinear decision feedback equalizer (DFE) in time domain, because the time domain signal is a digitally modulated symbol. In the conventional DFE, however, the noise is not white at the input of the decision device and correspondingly the decision is not optimum. In this paper, we propose an improved DFE scheme for SC-FDMA systems where a linear noise whitening filter is inserted before the decision device of the conventional DFE scheme. Through computer simulations, we compare the bit error rate performance of the proposed DFE scheme with the conventional equalizers.

A New Endpoint Detection Method Based on Chaotic System Features for Digital Isolated Word Recognition System (음성인식을 위한 혼돈시스템 특성기반의 종단탐색 기법)

  • Zang, Xian;Chong, Kil-To
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.46 no.5
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    • pp.8-14
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    • 2009
  • In the research field of speech recognition, pinpointing the endpoints of speech utterance even with the presence of background noise is of great importance. These noise present during recording introduce disturbances which complicates matters since what we just want is to get the stationary parameters corresponding to each speech section. One major cause of error in automatic recognition of isolated words is the inaccurate detection of the beginning and end boundaries of the test and reference templates, thus the necessity to find an effective method in removing the unnecessary regions of a speech signal. The conventional methods for speech endpoint detection are based on two linear time-domain measurements: the short-time energy, and short-time zero-crossing rate. They perform well for clean speech but their precision is not guaranteed if there is noise present, since the high energy and zero-crossing rate of the noise is mistaken as a part of the speech uttered. This paper proposes a novel approach in finding an apparent threshold between noise and speech based on Lyapunov Exponents (LEs). This proposed method adopts the nonlinear features to analyze the chaos characteristics of the speech signal instead of depending on the unreliable factor-energy. The excellent performance of this approach compared with the conventional methods lies in the fact that it detects the endpoints as a nonlinearity of speech signal, which we believe is an important characteristic and has been neglected by the conventional methods. The proposed method extracts the features based only on the time-domain waveform of the speech signal illustrating its low complexity. Simulations done showed the effective performance of the Proposed method in a noisy environment with an average recognition rate of up 92.85% for unspecified person.

A Genetic Algorithm for Materialized View Selection in Data Warehouses (데이터웨어하우스에서 유전자 알고리즘을 이용한 구체화된 뷰 선택 기법)

  • Lee, Min-Soo
    • The KIPS Transactions:PartD
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    • v.11D no.2
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    • pp.325-338
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    • 2004
  • A data warehouse stores information that is collected from multiple, heterogeneous information sources for the purpose of complex querying and analysis. Information in the warehouse is typically stored In the form of materialized views, which represent pre-computed portions of frequently asked queries. One of the most important tasks of designing a warehouse is the selection of materialized views to be maintained in the warehouse. The goal is to select a set of views so that the total query response time over all queries can be minimized while a limited amount of time for maintaining the views is given(maintenance-cost view selection problem). In this paper, we propose an efficient solution to the maintenance-cost view selection problem using a genetic algorithm for computing a near-optimal set of views. Specifically, we explore the maintenance-cost view selection problem in the context of OR view graphs. We show that our approach represents a dramatic improvement in terms of time complexity over existing search-based approaches that use heuristics. Our analysis shows that the algorithm consistently yields a solution that only has an additional 10% of query cost of over the optimal query cost while at the same time exhibits an impressive performance of only a linear increase in execution time. We have implemented a prototype version of our algorithm that is used to evaluate our approach.