• Title/Summary/Keyword: LibraryLookup

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A Study on LibraryLookup Services Using Bookmarklets (북마크릿을 활용한 LibraryLookup 서비스 제공방안에 관한 연구)

  • Gu, Jung-Eok;Lee, Eung-Bong
    • Journal of the Korean Society for information Management
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    • v.23 no.3 s.61
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    • pp.49-68
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    • 2006
  • It is required to enhance the value of ISBN as a tool for book search, identification, browsing, and improve the accessability and search capability of library OPAC. Bookmarklet is a small size javascript which can be saved as URL in a web browser bookmark or web page hyperlink. Open source bookmarklet can extract ISBN from web pages and search a book from library OPAC using the ISBN, so it is recognized as a simple but powerful search tool. In foreign countries, commercial library system vendors, libraries, OCLC, etc. are providing bookmarklets which allow a user to search for library holdings and loan information in a real time while he/she is travelling in an online bookshop web page. Therefore, this paper compared and analyzed international bookmarklets application examples and proposed LibraryLookup service in which library OPAC and online bookshop can make use of the bookmarklets.

The Comparison & Analysis of LibraryLookup Service Using Bookmarklets (북마크릿을 활용한 LibraryLookup서비스 비교.분석)

  • Gu Jung-Eok;Lee Eung-Bong
    • Proceedings of the Korean Society for Information Management Conference
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    • 2006.08a
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    • pp.215-222
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    • 2006
  • 도서관이 이용자에게 장애가 없는 도서관 서비스를 제공하기 위해서는 OPAC의 접근성과 검색성을 향상시키고, 도서의 검색, 식별 및 브라우징의 도구로써 ISBN의 활용가치를 높이는 것이 필요하다. 북마크릿은 웹브라우저의 '즐겨찾기에 추가' 또는 '연결(Links)' 툴바에 저장할 수 있는 작은 크기의 자바스크립트이다. 그리고 오픈소스인 북마크릿은 온라인서점의 웹페이지에서 ISBN을 추출한 다음, 해당 ISBN으로 도서관의 OPAC에서 도서를 검색할 수 있는 간단하지만 강력한 검색도구이다. 본 연구에서는 도서관 정보시스템의 새로운 환경인 Web 2.0, Library 2.0, OPAC 및 북마크릿에 대해 개괄적으로 고찰하였다. 그리고 해외에서 개발되어 활용되고 있는 네 가지 유형의 북마크릿에 대하 적용 사례를 비교 분석하고 그 특징과 장 단점을 정리하였다. 이를 통해서 국내 도서관의 OPAC과 온라인서점에서 북마크릿을 활용한 LibraryLookup 서비스 제공방안을 제안하였다.

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A Study on the Development of DOI Lookup API (DOI 수집 API 개발에 관한 연구)

  • Kim, Sun-Tae;Yae, Yong-Hee
    • Journal of Information Management
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    • v.39 no.1
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    • pp.221-237
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    • 2008
  • CrossRef provides a various queries(OpenAPIs) which can be used for DOI & meta data lookup. CrossRef encourages publishers and library societies to develop diverse system by using the queries. In this thesis, CrossRef's queries are analyzed and DOI Lookup API which could automatically lookup the DOI by various methods was developed. I proposed that how institutions having their own meta data can use the developed API.

A Study of Algorithm for Digital Technology (디지털 기술의 알고리즘에 관한 연구)

  • Youn, Choong-Mo;Kim, Jae-Jin
    • Journal of Digital Contents Society
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    • v.10 no.4
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    • pp.633-637
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    • 2009
  • In this paper, we present the reuse module library generating algorithm and register-transfer (RT) library generating algorithm considering the power consumption of reuse module for field-programmable gate array (FPGA) technology mapping in order to implement into the circuit for calculating power consumption. To realize the circuit of calculation of power consumption, the FPGA is selected. Considering lookup table (LUT) conditions of selected FPGA, technology mapping process is conducted to minimize the total power consumption. With these information, the circuit is realized using suitable given power consumption among allocated results of modules.

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A Design of the IP Lookup Architecture for High-Speed Internet Router (고속의 인터넷 라우터를 위한 IP 룩업구조 설계)

  • 서해준;안희일;조태원
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.7B
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    • pp.647-659
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    • 2003
  • LPM(Longest Prefix Matching)searching in If address lookup is a major bottleneck of IP packet processing in the high speed router. In the conventional lookup table for the LPM searching in CAM(Content Addressable Memory) the complexity of fast update take 0(1). In this paper, we designed pipeline architecture for fast update of 0(1) cycle of lookup table and high throughput and low area complexity on LPM searching. Lookup-table architecture was designed by CAM(Content Addressable Memory)away that uses 1bit RAM(Random Access Memory)cell. It has three pipeline stages. Its LPM searching rate is affected by both the number of key field blocks in stage 1 and stage 2, and distribution of matching Point. The RTL(Register Transistor Level) design is carried out using Verilog-HDL. The functional verification is thoroughly done at the gate level using 0.35${\mu}{\textrm}{m}$ CMOS SEC standard cell library.

Development of an efficient Service Management on Jini HomeNetwork (지니 홈네트워크상의 효율적인 서비스 관리 시스템 개발)

  • Jung, Jun-Young;Jung, Min-Soo;Kim, Kwang-Soo
    • The KIPS Transactions:PartD
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    • v.10D no.6
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    • pp.1017-1024
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    • 2003
  • Jini is a promising HomeNetworking middleware of computing environment based on Java Technology. To support Homenetwork service based on Jini, Jini device requires a successive operation and complicated management. In this paper, our service management system is a service provider component and lookup service component including automation module. Our automatin module privide searching and setting function of a library, runtime environment and class file system cinfiguration information for Jini service. Our system can be accomplished by automation of runtime environment, simplification of service management structure, visualization of service execution.

Hardware Design of Pipelined Special Function Arithmetic Unit for Mobile Graphics Application (모바일 그래픽 응용을 위한 파이프라인 구조 특수 목적 연산회로의 하드웨어 설계)

  • Choi, Byeong-Yoon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.8
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    • pp.1891-1898
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    • 2013
  • To efficiently execute 3D graphic APIs, such as OpenGL and Direct3D, special purpose arithmetic unit(SFU) which supports floating-point sine, cosine, reciprocal, inverse square root, base-two exponential, and logarithmic operations is designed. The SFU uses second order minimax approximation method and lookup table method to satisfy both error less than 2 ulp(unit in the last place) and high speed operation. The designed circuit has about 2.3-ns delay time under 65nm CMOS standard cell library and consists of about 23,300 gates. Due to its maximum performance of 400 MFLOPS and high accuracy, it can be efficiently applicable to mobile 3D graphics application.

An FPGA Implementation of the Synthesis Filter for MPEG-1 Audio Layer III by a Distributed Arithmetic Lookup Table (분산산술연산방식을 이용한 MPEG-1 오디오 계층 3 합성필터의 FPGA 군현)

  • Koh Sung-Shik;Choi Hyun-Yong;Kim Jong-Bin;Ku Dae-Sung
    • The Journal of the Acoustical Society of Korea
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    • v.23 no.8
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    • pp.554-561
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    • 2004
  • As the technologies of semiconductor and multimedia communication have been improved. the high-quality video and the multi-channel audio have been highlighted. MPEG Audio Layer 3 decoder has been implemented as a Processor using a standard. Since the synthesis filter of MPEG-1 Audio Layer 3 decoder requires the most outstanding operation in the entire decoder. the synthesis filter that can reduce the amount of operation is needed for the design of the high-speed processor. Therefore, in this paper, the synthesis filter. the most important part of MPEG Audio, is materialized in FPGA using the method of DAULT (distributed arithemetic look-up table). For the design of high-speed synthesis filter, the DAULT method is used instead of a multiplier and a Pipeline structure is used. The Performance improvement by 30% is obtained by additionally making the result of multiplication of data with cosine function into the table. All hardware design of this Paper are described using VHDL (VHIC Hardware Description Language) Active-HDL 6.1 of ALDEC is used for VHDL simulation and Synplify Pro 7.2V is used for Model-sim and synthesis. The corresponding library is materialized by XC4013E and XC4020EX. XC4052XL of XILINX and XACT M1.4 is used for P&R tool. The materialized processor operates from 20MHz to 70MHz.