• Title/Summary/Keyword: Large fault

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Enhanced Fault Location Algorithm for Short Faults of Transmission Line (1회선 송전선로 단락사고의 개선된 고장점 표정기법)

  • Lee, Kyung-Min;Park, Chul-Won
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.65 no.6
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    • pp.955-961
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    • 2016
  • Fault location estimation is an important element for rapid recovery of power system when fault occur in transmission line. In order to calculate line impedance, most of fault location algorithm uses by measuring relaying waveform using DFT. So if there is a calculation error due to the influence of phasor by DC offset component, due to large vibration by line impedance computation, abnormal and non-operation of fault locator can be issue. It is very important to implement the robust fault location algorithm that is not affected by DC offset component. This paper describes an enhanced fault location algorithm based on the DC offset elimination filter to minimize the effects of DC offset on a long transmission line. The proposed DC offset elimination filter has not need any erstwhile information. The phase angle delay of the proposed DC offset filter did not occurred and the gain error was not found. The enhanced fault location algorithm uses DFT filter as well as the proposed DC offset filter. The behavior of the proposed fault location algorithm using off-line simulation has been verified by data about several fault conditions generated by the ATP simulation program.

Evaluation on the Properties of the Current Limiting Part for Fault-Current-Limiting Type HTS Cables (사고전류 제한형 고온 초전도케이블의 한류부 특성평가)

  • Kim, Tae-Min;Hong, Gong-Hyun;Han, Byung-Sung;Du, Ho-Ik
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.28 no.3
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    • pp.191-195
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    • 2015
  • Inside the existing superconducting cables, the superconducting wire carries a loss-free current, and the cable former (the stranded copper wire) bypasses the fault current to prevent damage and loss of the superconducting cable when the fault current is applied. The fault-current-limiting-type superconducting cable proposed in this paper usually carries a steady current; but in a fault state, the cable generates self-resistance that makes the fault current lower than a certain width. That is, the superconducting cable that transmitted only a low voltage and a large capacity power repetitively limits the fault current, as does a superconducting current limiter. To complete this structure, it is essential to investigate the mutual resistance relationship between the superconducting wires after applying a fault current. Therefore, in this paper, one kinds of superconducting wires (a wire without a stabilization layer) were connected parallel 4 tapes, respectively; and after applying a fault current, the current, voltage, resistance and thermal stability of the HTS thin-film wires were examined.

Improvement of Test Method for t-ws Falult Detect (t-ws 고장 검출을 위한 테스트 방법의 개선)

  • 김철운;김영민;김태성
    • Electrical & Electronic Materials
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    • v.10 no.4
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    • pp.349-354
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    • 1997
  • This paper aims at studying the improvement of test method for t-weight sensitive fault (t-wsf) detect. The development of RAM fabrication technology results in not only the increase at device density on chips but also the decrease in line widths in VLSI. But, the chip size that was large and complex is shortened and simplified while the cost of chips remains at the present level, in many cases, even lowering. First of all, The testing patterns for RAM fault detect, which is apt to be complicated , need to be simplified. This new testing method made use of Local Lower Bound (L.L.B) which has the memory with the beginning pattern of 0(l) and the finishing pattern of 0(1). The proposed testing patterns can detect all of RAM faults which contain stuck-at faults, coupling faults. The number of operation is 6N at 1-weight sensitive fault, 9,5N at 2-weight sensitive fault, 7N at 3-weight sensitive fault, and 3N at 4-weight sensitive fault. This test techniques can reduce the number of test pattern in memory cells, saving much more time in test, This testing patterns can detect all static weight sensitive faults and pattern sensitive faults in RAM.

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An Improved Method of Faulted Section Identification Algorithm in Distribution Automation System (배전자동화시스템에서 단말장치의 고장표시 정보 생성 알고리즘 개선 방법)

  • Lim, Il-Hyung;Lim, Seong-Il;Lee, Seung-Jae;Kwon, Sung-Chul;Shin, Chang-Hoon;Ha, Bok-Nam;Choi, Myeon-Song
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.4
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    • pp.651-659
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    • 2007
  • This paper proposes an improved fault indication algorithm in a distribution automation system. A conventional fault indication method, so called YES-NO algorithm, could generate wrong informations under certain conditions such as line to ground fault, large motor double circuit line. In order to prevent mal-operation of fault indicator, direction of fault current are used as well as magnitude. The feasibility of the proposed algorithm has been testified by computer simulation using Matlab power system toolbox.

Design Method for HTS Wire Length of the Small Scale Resistive Type Superconducting Fault Current Limiter Considering System Resistance (계통 저항을 고려한 소용량 저항형 한류기의 초전도 선재 소모 길이 산출 연구)

  • Lee, W.S.;Choi, S.J.;Jang, J.Y.;Hwang, Y.J.;Kang, J.S.;Yang, D.G.;Lee, H.G.;Ko, T.K.
    • Progress in Superconductivity and Cryogenics
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    • v.13 no.3
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    • pp.14-18
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    • 2011
  • Electrical system is changing to smart grid which includes the distributed generations with reusable energy sources in these days. The distributed generations are environmentally friendly and have no concern with depletion problem. But dispatching distributed generations can cause an increase of the fault current. Resistive type super conducting fault current limiter is one of the candidates of solution for the large fault problem in smart grid. In this paper, a design method for the wire length of fault current limiter and the result of short circuit test for small scale modules considering system resistance are introduced.

Principal Component Analysis Based Method for Effective Fault Diagnosis (주성분 분석을 이용한 효과적인 화학공정의 이상진단 모델 개발)

  • Park, Jae Yeon;Lee, Chang Jun
    • Journal of the Korean Society of Safety
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    • v.29 no.4
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    • pp.73-77
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    • 2014
  • In the field of fault diagnosis, the deviations from normal operating conditions are monitored to identify the type of faults and find their root causes. One of the most representative methods is the statistical approaches, due to a large amount of advantages. However, ambiguous diagnosis results can be generated according to fault magnitudes, even if the same fault occurs. To tackle this issue, this work proposes principal component analysis (PCA) based method with qualitative information. The PCA model is constructed under normal operation data and the residuals from faulty conditions are calculated. The significant changes of these residuals are recorded to make the information for identifying the types of fault. This model can be employed easily and the tasks for building are smaller than these of other common approaches. The efficacy of the proposed model is illustrated in Tennessee Eastman process.

Quench Characteristics of a Inductive Superconducting Fault Current Limiter (유도형 초전도사고전류제한기의 퀜치특성)

  • Choi, K.D.;Lee, S.J.;Kim, D.S.;Lee, J.K.;Kim, D.H.;Cha, G.S.;Hahn, S.Y.
    • Proceedings of the KIEE Conference
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    • 1994.11a
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    • pp.114-116
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    • 1994
  • Recently a superconducting fault current limiter(SFCL) has public attentions for the solution of large fault currents of power systems. Though a SFCL has more effective characteristics than the other current limiting devices, there are many problems to apply it to real power systems. For the analysis of transient fault characteristics of the SFCL, we designed and fabricated a inductive SFCL and tested it in 35V line. The superconducting cable of the SFCL was quenched at lower current(49A) than the designed critical current but it limited the fault current to the lower value(150A) than the one expected without SFCL(250A). And within one period the fault current decreased lower than normal laod current.

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A top-down iteration algorithm for Monte Carlo method for probability estimation of a fault tree with circular logic

  • Han, Sang Hoon
    • Nuclear Engineering and Technology
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    • v.50 no.6
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    • pp.854-859
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    • 2018
  • Calculating minimal cut sets is a typical quantification method used to evaluate the top event probability for a fault tree. If minimal cut sets cannot be calculated or if the accuracy of the quantification result is in doubt, the Monte Carlo method can provide an alternative for fault tree quantification. The Monte Carlo method for fault tree quantification tends to take a long time because it repeats the calculation for a large number of samples. Herein, proposal is made to improve the quantification algorithm of a fault tree with circular logic. We developed a top-down iteration algorithm that combines the characteristics of the top-down approach and the iteration approach, thereby reducing the computation time of the Monte Carlo method.

A Process Decomposition Strategy for Qualitative Fault Diagnosis of Large-scale Processes (대형공정의 정성적 이상진단을 위한 공정분할전략)

  • Lee Gibaek
    • Journal of the Korean Institute of Gas
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    • v.4 no.4 s.12
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    • pp.42-49
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    • 2000
  • Due to their size and complexity, it is very difficult to make diagnostic system for the whole chemical processes. Therefore, a systematic approach is required to decompose larpge-scale process into sub-processes and then diagnose them. This paper suggests a method for the minimization of knowledge base and flexible diagnosis to be used in qualitative fault diagnosis based on Fault-Effect Tree model. The system can be decomposed for flexible diagnosis, size reduction of knowledge base, and consistent construction of complex knowledge base. The new node, gate-variable, is introduced to connect the cause-effect relationships of each sub-process. For on-line diagnosis, off-line analysis is performed to construct Fault-Effect Trees of gate-variables as well as activation conditions of gate-variables. On-line diagnosis strategy is modified to get the same diagnosis result without system decomposition. The proposed method is illustrated with a fault diagnosis system for a large-scale boiler plant.

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Fault Diagnosis of High-Speed Rotating Machinery With Control Moment Gyro for Medium and Large Satellite Using Envelope Spectrum Analysis (포락선 스펙트럼 분석을 이용한 중대형 위성용 제어모멘트자이로의 고속회전체 고장진단)

  • Kang, Jeong-Min;Song, Tae-Seong;Lee, Jong-Kuk;Song, Deok-Ki;Kwon, Jun-Beom;Lee, Il;Seo, Joong-Bo
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.50 no.6
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    • pp.413-422
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    • 2022
  • In this paper, the fault analysis of the momentum wheel, which is a high-speed rotary machinery of 'Control Moment Gyro' for medium and large satellite, was described. For fault diagnosis, envelope spectrum analysis was performed using Hilbert transformation method and signal demodulation method to find the impact signals periodically generated from amplitude modulated signals. Through this, the fault of the momentum wheel was diagnosed by analyzing whether there was a harmonic component of the rotational frequency and a bearing fault frequency in a specific frequency band with a high peak.