• 제목/요약/키워드: Ladder diagram

검색결과 53건 처리시간 0.027초

함수의 도입을 위한 사다리타기 게임의 수학적 분석 (Mathematical Analysis of Ladder Diagram Games for the introduction of the function)

  • 이광연;이광상;유기종
    • 한국수학교육학회지시리즈E:수학교육논문집
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    • 제27권3호
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    • pp.267-281
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    • 2013
  • 본 연구는 사다리타기 게임을 중학교 수학에서 함수의 도입과 고등학교에서의 합성함수의 도입을 위한 소재로서의 가능성을 탐색하고 있다. 사다리타기 게임에 사용되는 사다리그림은 일대일대응이 되므로 집합을 도입하지 않고도 직관적으로 쉽게 함수의 개념을 도입할 수 있다. 또한 하나의 가로선을 갖는 사다리그림은 일대일대응이므로 r개의 가로선을 갖는 사다리그림은 r개의 일대일대응의 합성함수를 결정함을 알 수 있다. 본 연구에서는 일대일대응에 대한 기본적인 몇 가지 사실에 대하여 사다리그림을 이용하여 수학적으로 증명하였고, 중학교에서의 함수와 고등학교에서 합성함수를 사다리타기 게임으로 도입할 수 있음을 제시하였다. 일대일대응에 대한 사다리그림은 학생들의 흥미와 집중을 유도할 수 있을 뿐만 아니라 함수의 개념을 직관적으로 쉽게 이해하게 하는 좋은 소재로 활용할 수 있다.

이산사건모델에 기반한 PLC 래더다이어그램 자동합성 (Synthesis of Ladder Diagrams for PLCs Based on Discrete Event Models)

  • 강봉석;조광현
    • 제어로봇시스템학회논문지
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    • 제7권11호
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    • pp.939-943
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    • 2001
  • PLC(programmable Logic Controller)s essential components of modern automation systems encompassing almost every industry. Ladder Diagrams (LD) have been widely used in the design of such PLC since the LD is suitable for the modeling of the sequential control system. However, the synthesis of LD itself mainly depends on the experience of the industrial engineer, which may results in unstructured or inflexible design. Hence, in this paper, we propose a ladder diagram conversion algorithm which systematically produces LDs for PLCs based on discrete event models to enhance the structured and flexible design mechanism.

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PLC로 제어되는 기계에서 Fault Tree를 효과적으로 생성하기 위한 LAT(Ladder Analysis Tool)개발 (LAT System for Fault Tree Generation)

  • 김선호;김동훈;김도연;한기상;김주한
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 1997년도 추계학술대회 논문집
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    • pp.442-445
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    • 1997
  • A challenging activity in the manufacturing industry is to perform in real time the continuous monitoring of the process state, the situation assessment and identification of the problem on line and diagnosis of the cause and importance of the problem if he process does not work properly. This paper describes LAT(Ladder Analysis Tool) system for fault tree generation to improving the fault diagnosis of CNC machine tools. The system consists of 4 steps which can automatically ladder analysis from ladder diagram to two diagnosis function models. The two diagnostic models based on he ladder diagram is switching function model and step switching function model. This system tries to overcome diagnosis deficiencies present machine tool.

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고속 프로그램형 논리 제어기 구현을 위한 래더 다이어그램 해석 방법 (A Translation Method of Ladder Diagram for High-Speed Programmable Logic Controller)

  • 김형석;장래혁;권욱현
    • 제어로봇시스템학회논문지
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    • 제5권1호
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    • pp.33-38
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    • 1999
  • This paper proposes a translation approach for PLCs (Programmable logic controllers) converting ladder diagrams directly to native codes, and describes detailed steps of the method followed by performance evaluation. A general-purpose DSP (Digital signal processor) based implementation validates the approach as well. A benchmark test shows that the Proposed translation framework fairly speeds up execution in comparison with the existing interpretation approach.

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공작기계의 고장원인을 효과적으로 생성하기 위한 Switching Function Generator 개발 (Development of Switching Function Generator for Fault Reasons of CNC Machine Tool)

  • 김동훈;김도연;김선호;이은애;한기상
    • 한국공작기계학회:학술대회논문집
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    • 한국공작기계학회 2002년도 춘계학술대회 논문집
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    • pp.48-52
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    • 2002
  • The fault analysis of the CNC machine tool which is controlled sequentially by PLC is generally based on ladder diagram. When machine tool has faults, it takes a lot of operator's experiences and times to identify logical relationship because ladder diagram is a step structured language. Therefore the technologies of finding out fault reasons automatically is necessary. In this paper, the SFG(Switching Function Generator) system is developed to analysis fault reasons correctly. The SF(Switching Function) and SSF(Step Switching Function) generated from SFG based on ladder diagram are experimented to identify the performance of SFG.

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PLC LD 제어언어와 가상 플랜트 시뮬레이터의 적용 (The application of a virtual plant simulator and a Ladder Diagram of PLC)

  • 이기범;이진수
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1999년도 하계학술대회 논문집 B
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    • pp.699-702
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    • 1999
  • This paper represents the application of a virtual plant simulator and a Ladder Diagram of PLC. A target plant is a material transport car that repeatedly conveys along the rails. The whole process is automatically operated by PLC. The simulation system consists of the POSFA PLC and the virtual plant simulator. We demonstrate that operation of a LD program corresponds to operation of the virtual plant simulator.

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A Study On the EMFG Representation of the Relay Circuits and Ladder Diagram

  • Kim, Hee-Jung;Paek, Hyung-Goo;Yeo, Jeong-Mo
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2001년도 ICCAS
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    • pp.124.4-124
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    • 2001
  • It needs a skillful experience to design and implement sequential circuits with a relay circuit or LD (Ladder Diagram). One makes out the operation of relay contacts sequentially in case of analyzing a relay circuit or LD. Still more, the design and analyzing of a complex relay circuit or LD are difficult. In this paper, we propose the EMFG (Extended Mark Graph) representation on relay circuits and LD.

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UML 기반 PLC 래더 로직 설계와 코드 자동 생성 (UML-based PLC Ladder Logic Design and Automatic Generation of Ladder Code)

  • 한관희;박준우
    • 한국CDE학회논문집
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    • 제14권1호
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    • pp.50-59
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    • 2009
  • There are two main problems in the current PLC ladder programming practices: First, currently there are no widely adopted systematic design methods to deal with PLC based control systems in the shop floor. So, the control logic design phase is usually omitted in current PLC programming development life cycle. Second, PLC ladder logic provides only microscopic view of system processes. As a result, it is difficult for FA engineers to have overall perspectives about the interaction of system components intuitively during the verification step of logic errors. To solve these problems, this paper proposed object-oriented design and automatic generation method of PLC ladder logic. Based on the proposed method, the computer software to assist the automatic ladder logic generation is also developed.

PLC 래더다이어그램의 체계적인 분석을 위한 이산사건모델 변환 알고리즘 (Discrete Event Model Conversion Algorithm for Systematic Analysis of Ladder Diagrams in PLCs)

  • 강봉석;조광현
    • 제어로봇시스템학회논문지
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    • 제8권5호
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    • pp.401-406
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    • 2002
  • As product lifecycles become shorter, factories are pushed to develop small batches of many different products. The highly flexible control systems has become a necessity. The majority of existing automated industrial systems are controlled by programmable logic controllers(PLCs). In most cases, the control programs for PLCs are developed based on ladder diagrams(LDs). However, it is difficult to debug and maintain those LDs because the synthesis of LD itself mainly depends on the experience of the industrial engineer via trial-and-error methods. Hence, in this paper, we propose a discrete event model conversion algorithm for systematic analysis of LDs. The proposed discrete event model conversion algorithm is illustrated by an example of a conveyor system.