• The Korean Journal of Pain
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• v.10 no.1
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• pp.34-41
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• 1997

Background : Patient-controlled analgesia(PCA) is a safe and effective technique for providing postoperative pain relief. Studies that compare epidural vs intravenous routes of opiate administration show conflicting results. We designed a prospective, randomized, controlled study to evaluate the safety and efficacy of epidural(EPI-PCA) morphine-bupivacaine versus intravenous (IV-PCA) nalbuphine when administered with a PCA system. Methods : Forty healthy women were randomly assigned to receive an epidural bolus of morphine 3 mg and 0.5% bupivacaine 10 ml, followed by a EPI-PCA with 0.01% morphine and 0.143% bupivacane (basal infusion 1 ml/hr, bolus 1 ml, lock-out interval 30 min) or intravenous bolus of nalbuphine 0.1 mg/kg followed by a IV-PCA with nalbuphine(basal infusion 1 mg/hr, bolus 1 ml, lock-out interval 20 min) for pain relief after cesarean delivery. This study was conducted for 2 days after cesarean section to compare the analgesic efficacy, side effects, patient satisfaction either as EPI-PCA or as IV-PCA. Results : EPI-PCA group had significant lower visual analog pain scale(VAS) at immediate postoperative period, whereas no significant difference was observed when pain was assessed at other time sequence. Urinary retention and pruritus were more frequent with EPI-PCA group, although the incidence of other side effects were the same. Conclusions : Although EPI-PCA with morphine-bupivacaine was of significantly lower VAS at immediate postoperative period, IV-PCA with nalbuphine is a safe and effective alternative to EPI-PCA with morphine-bupivacaine for providing pain relief after cesarean delivery. Further studies about IV-PCA with nalbuphine are needed to control the immediate postoperative pain and to further improve effective pain management.

• Korean Journal of Applied Biomechanics
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• v.30 no.1
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• pp.7-16
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• 2020

Objective: It is to find factors related to stability through analysis of plantar pressure factors according to the level of instability when performing Snatch. Method: Foot pressure analysis was performed while 10 weightlifters performed 80% of the highest level of Snatch, and motion was classified and analyzed in 3 grades according to the level of instability. Results: First, in Bad Motion, the movement distance of the pressure center in the direction of ML and AP was larger significantly in Phase 2. Second, in Phase 2, the number of zero-crossing in the AP direction was larger statistically significantly in Good Motion. Third, in the bad motion in Phase 3, the number of zero-crossing in the ML direction showed a significantly larger value. Fourth, in Phase 4, it was found that the more stable the lock out motion, the greater the activity of foot controlling in the left and right directions. Fifth, Phase 3, the greater the Maximum/Mean foot pressure value, the more stable the pulling action. Sixth, in Phase 2, the foot pressure was concentrated with a wide distribution in the midfoot and rearfoot. Seventh, the triggering number of the forefoot region was small in the last pull phase. Eighth, the number of triggers in the toe area was significantly higher during Good Motion in Phase 4. Conclusion: Summarizing the factors of instability in Snatch, there was no significant difference in Phase 1 for each condition. In order to enhance the stability in Phase 2, the sensory control ability in the AP direction is required, and focusing the foot pressing motion with a wide distribution in the middle and rear parts increases the instability. In Phase 3, it was found that the more unstable, the more sensory control activity was performed in the ML direction, the stronger the forefoot pressing action should be performed for a stable Snatch. In Phase 4, It is important that the feet sensory control activity in ML directions and the control ability of the toes in order to have stable Lock out motion.

• 보존과학연구
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• s.24
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• pp.187-213
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• 2003

Sungseonsa Temple site in Chungju city in Chungcheongbuk-doProvince is written in "Goryeosa" as a building for Queen Sinmyeongsunseong, the mother of Gwangjong in AD 954 in Goryeo Dynasty. The museum in Chungcheong University takes charge of the excavation for 3 times from 2000 to 2002 and identified that its construction was carried out till Joseon Dynasty. Among the iron artifacts from the first excavation such as a weeding hoe, a hand knife, a lock, two nails and a plow which had conservation treatments, the sample was collected. Its micro-structure and method of manufacture were investigated. Excavation report for those artifacts has not published yet, therefore, the date of each artifacts is not clearly confirmed. The samples were collected from each part of the objects and then embedded in epoxy resin and etched with nitric acid. The examination of its microstructure is carried out under the microscope and the hardness values were measured by Vickers hardness tester. From the results, some artifacts show different manufacture method sin the each parts. The forming processes of the iron weeding hoe and the iron sickle are similar but the blade of iron weeding hoe was strengthened by carbonization whereas the blade of the iron sickle was done by quenching. The hand knife and the nails were produced through almost same methods and shows similar microstructures. The hand knife seems to be made by repeated beating and folding in low temperature resulting in fine crystallization, but the nail shows large crystallization due to processes in high temperature. Lock is made of white cast iron, that does not show any heat treatment.

• Journal of the Institute of Convergence Signal Processing
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• v.7 no.4
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• pp.195-200
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• 2006

The conventional discrete circuit for ABS/TCS system was examined and the problems of the system were analyzed by computer simulation. In order to improve the performance of ABS/TCS system, interface IC which has error compensation, comparator and under voltage lock-out circuit was designed and their electrical characteristics were investigated. The voltage regulator was included to compensate the temperature variation in the temperature range from $-20^{\circ}C$ to $120^{\circ}C$ for automobile environment. ABS and brake signal were separated using the duty factor of same frequency or different frequencies. UVLO(Under Voltage Lock-Out) circuit and constant current circuit were applied for the elimination of noise, and protection circuit was applied to cut the excess current off. Layout for IC fabrication was designed to enhance the electrical performance of ABS/TCS system. Layout was consisted of 11 masks, arrayed effectively 8 pads to reduce the current loss. We can see that the result of layout simulation was better than the result of bread board.

• Journal of the Korean Society of Industry Convergence
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• v.21 no.6
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• pp.265-271
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• 2018

DC-DC buck converter is a critical building block in the power management integrated circuit (PMIC) architecture for the portable devices such as cellular phone, personal digital assistance (PDA) because of its power efficiency over a wide range of conversion ratio. To ensure a safe operation, avoid unexpected damages and enhance the reliability of the converter, fully-integrated protection circuits such as over voltage protection (OVP), under voltage lock out (UVLO), startup, and thermal shutdown (TSD) blocks are designed. In this paper, these three fully-integrated protection circuit blocks are proposed for use in the DC-DC buck converter. The buck converter with proposed protection blocks is operated with a switching frequency of 1 MHz in continuous conduction mode (CCM). In order to verify the proposed scheme, the buck converter has been designed using a 180 nm CMOS technology. The UVLO circuit is designed to track the input voltage and turns on/off the buck converter when the input voltage is higher/lower than 2.6 V, respectively. The OVP circuit blocks the buck converter's operation when the input voltage is over 3.3 V, thereby preventing the destruction of the devices inside the controller IC. The TSD circuit shuts down the converter's operation when the temperature is over $85^{\circ}C$. In order to verify the proposed scheme, these protection circuits were firstly verified through the simulation in SPICE. The proposed protection circuits were then fabricated and the measured results showed a good matching with the simulation results.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.255-256
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• 2006

In this paper, we investigated the. characteristics of fault current limiting according to fault angle in the integrated three-phase flux-lock type SFCL in fault types such as the single-line-to-ground fault, the double-line-to-ground fault and the three-line-to-ground fault. When the SFCL is operating under normal condition, the magnetic flux generated between primary and secondary coils of each single phase is canceled out perfectly, so that the impedance of the SFCL is also not generated and the power system can be operated normally without any loss, However, if a fault occurs even in any phase out of three phases, quench happened in SFCL elements and the current flowing secondary coil is restricted abruptly. Finally, the balance of magnetic flux in whole SFCL system is destroyed, and the fault currents in every phase could be limited at the same time irrespective of the fault types. As a result, the developed SFCL in this study were operated normally as expected and the purpose of the integration of 3 phase current limiting was also achieved successfully. However, the fault current limiting characteristics of the SFCL was dependant on the quench characteristics of HTSC elements in each phase, and it was expected that the improvement of the SFCL could be possible through the introduction of HTSC elements which have better critical characteristics.

• Proceedings of the KIEE Conference
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• 2015.07a
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• pp.1020-1021
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• 2015

본 논문에서는 상용전압 AC 220V를 인가전압으로 사용하여 PMIC(Power Management IC)의 구동에 적합한 전압을 인가해주는 Pre-Regulator를 설계하였다. 설계된 Pre-Regulator는 상용전압을 사용하기 때문에 Device의 내압이 700V인 Magnachip $0.35{\mu}m$ BCD 공정을 이용하여 설계되었으며, 회로의 구성은 저전압 입력 보호 기능 및 JFET의 구동 제어를 위한 Under Voltage Lock Out(UVLO)회로, 전압조정기(Regulator)의 기준전압을 생성해주는 밴드갭 기준전압 발생(Bandgap Reference)회로, LDO(Low Drop Out)회로로 구성되어있다.

• Proceedings of the KSME Conference
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• 2008.11a
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• pp.244-249
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• 2008

It happened a failure on special bolt which supported main landing gear actuator up-lock rod of 00 aircraft. Fracture was occurred at end of center drilled hole and thread machined on bolt. Metallographic, fractographic, and other characteristics of embrittlement analysis and experiments carried out on the failed bolt to find out the reason. Bolt surface was cadmium electroplated(EP) to give lubrication and provide excellent corrosion resistance. Resultly, Bolt was failed due to cadmium embrittlement occurred during baking treatment as well as center drilled hole. for the failure that are relevant to failure analysis and prevention. For their successful functional application, cadmium EP bolts require proper and adequate baking treatment after electroplating, and is complete with no center drilled hole

• Journal of the Korea Institute of Military Science and Technology
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• v.13 no.5
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• pp.769-774
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• 2010

It happened fractures on special bolt which supported main landing gear actuator up-lock rod of aircraft. Cracks were initiated mainly from the center hole and the external thread of the special bolt. To find out failure root causes, metallographic, fractographic analyses as well as test work were carried out. From the fractographic study by SEM work, fracture occurred by a brittle intergranular type failure. The fracture could be occurred primarily by solid-metal-induced embrittlement due to cadmium embrittler penetrated into the flaw existed after machining work for center hole and thread on the bolt during baking treatment processing to eliminate hydrogen. For its successful application, cadmium EP bolts require proper and adequate baking treatment after electroplating, and make no more drilled center hole on the bolt to prevent same failure.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.5
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• pp.71-79
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• 2010

This paper presents a design of a LLC resonant controller IC. LLC resonant controller IC controls the voltage of the 2nd side by adjusting frequency the input frequency of the external resonant circuit. The clock generator is integrated to provide the pulse to the resonant circuit and its frequency is controlled by the external resistor. Also, the frequency of the VCO is adjusted by the feedback voltage. The protection circuits such as UVLO(Under Voltage Lock Out), brown out, fault detector are implemented for the reliable and stable operation. The HVG, and LVG drivers can provide the high current and voltage to the IGBT. The designed LLC resonant controller IC is fabricated with the 0.35 um 2P3M BCD process. The overall die size is $1400um{\times}1450um$, and supply voltage is 5V, 15V.