• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.2
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• pp.1-5
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• 2008

Although we can make a sparse matrices for LDPC codes, the encoding complexity per a block increases quadratically by $n^2$. We propose modified PEG algorithm using PEG algorithm having a large girth by establishing edges or connections between symbol and check nodes in an edge-by-edge manner. M-PEG construct parity check matrices. So we propose parity check matrices H form a dual-diagonal matrices that can construct a more efficient decoder using a M-PEG(modified Progressive Edge Growth).

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.10 s.101
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• pp.965-972
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• 2005

In this paper, we first review LDPC codes in general and a belief propagation algorithm that works in logarithm domain. LDPC codes, which is chosen for second generation digital video broadcasting standard, are required a large number of computation due to large size of coded block and iteration. Therefore, we presented two kinds of low computational algorithm for LDPC codes. First, sequential decoding with partial group is proposed. It has same H/W complexity, and fewer number of iteration's are required at same performance in comparison with conventional decoder algerian. Secondly, early detection method for reducing the computational complexity is proposed. Using a confidence criterion, some bit nodes and check node edges are detected early on during decoding. Through the simulation, we knew that the iteration number are reduced by half using subset algorithm and computational complexity of early detected method is about $50\%$ offs in case of check node update, $99\%$ offs in case of check node update compared to conventional scheme.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.2C
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• pp.148-154
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• 2010

In this paper, we first review LDPC codes in general and a belief propagation algorithm that works in logarithm domain. LDPC codes, which is chosen 802.11n for wireless local access network(WLAN) standard are required a large number of computation due to large size of coded block and iteration. Therefore, we presented three kinds of low computational algorithm for LDPC codes. First, sequential decoding with partial group is proposed. It has same H/W complexity, and fewer number of iteration's are required at same performance in comparison with conventional decoder algorithm. Secondly, we have apply early stop algorithm. This method is reduced number of unnecessary iteration. Third, early detection method for reducing the computational complexity is proposed. Using a confidence criterion, some bit nodes and check node edges are detected early on during decoding. Through the simulation, we knew that the iteration number are reduced by half using subset algorithm and early stop algorithm is reduced more than one iteration and computational complexity of early detected method is about 30% offs in case of check node update, 94% offs in case of check node update compared to conventional scheme.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.2
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• pp.37-43
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• 2008

The performance and hardware complexity of LDPC decoders depend on the design parameters of quantization, the clipping threshold $c_{th}$ and the number of quantization bits q, and also on the maximum number of decoding iterations. In this paper, the BER performances of LDPC codes are evaluated according to the clipping threshold $c_{th}$ and the number of quantization bits q through the simulation studies. By comparing the quantized Min-Sum algorithm with the ideal Min-Sum algorithm, it is shown that the quantized case with $c_{th}=2.5$ and q=6 has the best performance, which approaches the idea case. The decoding complexities are calculated and the word error rates(WER) are estimated by using the pdf which is obtained through the statistical analyses on the iteration numbers. These results can be utilized to tradeoff between the decoding performance and the complexity in LDPC decoder design.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.9
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• pp.744-749
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• 2013

We propose soft user data input on LDPC codes with parity encoded by the (1, 7) run length limited (RLL) code for perpendicular magnetic recording channel. The user data are encoded by maximum transition run (MTR) (3;11) code. In order to minimize the loss of code rate, the (1, 7) RLL code only encode the parity of LDPC. Also, to increase performance, we propose only user data part applied soft output Viterbi algorithm (SOVA). The performance using the SOVA showed good performance lower than 26 dB. In contrast, it showed worse performance high than 26 dB. This is because of incorrect soft information by high jitter noise and two different input types for LDPC decoder.

• Proceedings of the KIEE Conference
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• 2006.07d
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• pp.2027-2028
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• 2006

추정된 채널 정보를 바탕으로 적용하는 적응형 비트 로딩 방식은, 전력선 통신 시스템의 고속화 및 대용량 데이터 전송을 위해 최근 대두되고 있는 LDPC(Low Density Parity Check) coded OFDM 시스템에 대해, 한정된 주파수 대역과 신호 전력의 효율적 사용을 제공한다. 그러나 적응형 비트로딩 방식은 한정된 수의 일정 SNR(신호대 잡음 전력비) 구간에 대한 mapping 방식으로 적용되기 때문에 송수신 과정에서 추정된 채널 정보를 이용하는 sum-product 복호기가 채널 변화에 민감하게 반응하지 못하는 상황이 발생하며, 결국 송신단에서 채널 추정 결과를 바탕으로 선택된 SNR 범위에 대해서는 실제 수신되는 신호에 대한 SNR과의 차이가 존재하고 시스템의 성능은 그 만큼의 성능 열하로 나타나게 된다. 본 논문에서는 이러한 성능 열하 정도를 시뮬레이션을 통해 확인하였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.2C
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• pp.139-147
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• 2010

A novel turbo coded modulation scheme, called turbo-APPM, for deep space optical communications is constructed. The constructed turbo-APPM is a serial concatenations of turbo codes, an accumulator and a pulse position modulation (PPM), where turbo codes act as an outer code while the accumulator and the PPM act together as an inner code. The generator polynomial and the puncturing rule for generating turbo codes are chosen to show the low bit error rate. At the receiver, the joint decoding is performed by exchanging soft information iteratively between the inner decoder and the outer decoder. In the outer decoder, a local iterative decoding for turbo codes is conducted before transferring soft information to the inner decoder. Poisson distribution is used to model the deep space optical channel. It is shown by simulations that the constructed turbo-APPM provides coding gains over all previously proposed schemes such as LDPC-APPM, RS-PPM and SCPPM.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.1
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• pp.38-46
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• 2012

In this paper, we propose a decision feedback equalizer based on LDPC(Low Density Parity Check) code for the fast processing and performance improvement in OFDM system. LDPC code has good error correcting capability and its performance approaches the Shannon capacity limit. However, it has longer parity check matrix and needs more iteration numbers. In our proposed system, MSE(Mean Square Error) of signal between decision device and decoder is fed back to equalizer. This proposed system can improve BER performance because it corrects estimated channel response more accurately. In addition, the proposed system can reduce complexity because it has a lower number of iterations than system without feedback at the same performance. Simulation results evaluate and show the performance of OFDM system with the CFO and phase noise in multipath channel.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.4C
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• pp.329-336
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• 2010

Distributed source coding (DSC) system moves computational burden from encoder to decoder, so it takes higher decoding complexity. This paper explores the problem of reducing the decoding complexity of practical Slepian-Wolf coding using low-density parity check accumulate (LDPCA) codes. It is shown that the convergence of mean magnitude (CMM) stopping criteria for LDPC codes help reduce the 85% of decoding complexity under the 2% of compression rate loss, and marginal initial rate request reduces complexity below complexity minimum bound. Moreover, inter-rate stopping criterion, modified for rate-adaptable characteristic, is proposed for LDPCA codes, and it makes decoder perform less iterative decoding than normal stopping criterion does when channel characteristic is unknown.

• ETRI Journal
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• v.31 no.5
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• pp.585-592
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• 2009

This paper presents a method for decoding high minimal distance ($d_{min}$) short codes, termed Cortex codes. These codes are systematic block codes of rate 1/2 and can have higher$d_{min}$ than turbo codes. Despite this characteristic, these codes have been impossible to decode with good performance because, to reach high $d_{min}$, several encoding stages are connected through interleavers. This generates a large number of hidden variables and increases the complexity of the scheduling and initialization. However, the structure of the encoder is well suited for analog decoding. A proof-of-concept Cortex decoder for the (8, 4, 4) Hamming code is implemented in subthreshold 0.25-${\mu}m$ CMOS. It outperforms an equivalent LDPC-like decoder by 1 dB at BER=$10^{-5}$ and is 44 percent smaller and consumes 28 percent less energy per decoded bit.