• Title/Summary/Keyword: L/D converter

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Optimum Design of Teeth Shapes of Rotating Serration and Spline-type Torque Converter Parts Operating in a High Temperature Fluids (고온에서 맞물려 회전하는 토크컨버터 부품간 열 및 토크를 고려한 치형상의 최적설계)

  • Lee, Dong-uk;Kim, Cheol;Kim, Jungjun;Shin, Sooncheol
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.41 no.11
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    • pp.1125-1130
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    • 2017
  • The tooth shapes of serration-type and spline-type reactors are optimized using finite element methods to improve the working life of the part and to lower the stress concentration during rotation resulting from contact with the outer race for a reactor operating with $170^{\circ}C$ transmission oil. The results of thermal expansion analyses between an Al reactor and the steel outer race indicate that, before optimization, the gap between the two parts increases further as the serration-type reactor expands by 0.1 mm and the spline-type one strains by 0.08 mm. Because of shape optimization, a trapezoidal shape is obtained from the initial triangular serration and the rectangular spline of the two reactors. The maximum von Mises stress of the serration-type convertor decreased by 24.5 %, and by 9.3 % for the spline-type convertor. In addition, there is a 13 % reduction in the axial thickness, as compared to the initially designed model.

Design and Fabrication of K-band multi-channel receiver for short-range RADAR (근거리 레이더용 K대역 다채널 전단 수신기 설계 및 제작)

  • Kim, Sang-Il;Lee, Seung-Jun;Lee, Jung-Soo;Lee, Bok-Hyung
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.37 no.7A
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    • pp.545-551
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    • 2012
  • In this paper, K-band multi-channel receiver was designed and fabricated for low noise amplification and down conversion to L-band. The fabricated multi-channel receiver incorporates GaAs-HEMT LNA(Low noise amplifier) which provides less than a 2 dB noise figure, IR(Image Rejection) Filter for rejection of image frequency, IR(Image rejection) mixer to reject a image frequency and improve an IMD(Intermodulation Distortion) characteristic. Test results of the fabricated multi-channel receiver show less than a 3.8 dB noise figure, conversion gain of more than 27dB, and IP1dB(Input 1dB Gain Compression Point) of -9.5 dB and over.

The Effect of Hydraulic Efficiency on the Design Variables of an Overtopping Wave Energy Converter (월파수류형 파력발전구조물의 상부 사면 설계변수에 따른 수력학적 효율 영향 연구)

  • An, Sung-Hwan;Kim, Geun-Gon;Lee, Jong-Hyun
    • Journal of the Korean Society of Marine Environment & Safety
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    • v.28 no.1
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    • pp.168-174
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    • 2022
  • In a wave power generation system, the overtopping system is known as an overtopping wave energy converter (OWEC). The performance of an OWEC is affected by wave characteristics such as height and period because its power generation system is sensitive to those characteristics; these, as well as wave direction, depend on the sea. As these characteristics vary, it is hard for the OWEC to produce power in a stable manner. Therefore, it is necessary to find an appropriate shape for an OWEC, according to the characteristics of the sea it is in. This research verified the effect of the design of the OWEC ramp on the hydraulic efficiency using the smoothed particle hydrodynamics (SPH) particle method. A total of 10 models were designed and used in simulations performed by selecting the design parameters of the ramp and changing the attack angle based on those parameters. The hydraulic efficiency was calculated based on the rate of discharged water obtained from the analysis result. The effect of each variable on the overtopping performance according to the shape of the ramp was then confirmed. In this study, we present suggestions for determining the direction for an appropriately shaped OWEC ramp, based on a specific sea area.

Fabrication and Characteristics of Hot-film Anemometer (열박막 풍속계의 제작 및 특성)

  • Kim, Hyung-Pyo;Cho, Chan-Seob
    • Journal of Sensor Science and Technology
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    • v.9 no.3
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    • pp.190-195
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    • 2000
  • The paper presents the constant temperature digital hot-film anemometer that measures easily a wind velocity at the indoor. The output is linearized using microprocessor and analog-to-digital converter, because the fourth root of the wind velocity is the output voltage of the sensor. The comparison result between fabricated and reference anemometer is less than ${\pm}2%$. In the range of air temperature of $23^{\circ}C{\sim}60^{\circ}C$, the error is about ${\pm}1%$ in wind velocity 10m/sec.

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An InGaP/GaAs HBT Monolithic VCDRO with Wide Tuning Range and Low Phase Noise

  • Lee Jae-Young;Shrestha Bhanu;Lee Jeiyoung;Kennedy Gary P.;Kim Nam-Young
    • Journal of electromagnetic engineering and science
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    • v.5 no.1
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    • pp.8-13
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    • 2005
  • The InGaP/GaAs hetero-junction bipolar transistor(HBT) monolithic voltage-controlled dielectric resonator oscillator(VCDRO) is first demonstrated for a Ku-band low noise block down-converter(LNB) system. The on-chip voltage control oscillator core employing base-collector(B-C) junction diodes is proposed for simpler frequency tuning and easy fabrication instead of the general off-chip varactor diodes. The fabricated VCDRO achieves a high output power of 6.45 to 5.31 dBm and a wide frequency tuning range of ]65 MHz( 1.53 $\%$) with a low phase noise of below -95dBc/Hz at 100 kHz offset and -115 dBc/Hz at ] MHz offset. A]so, the InGaP/GaAs HBT monolithic DRO with the same topology as the proposed VCDRO is fabricated to verify that the intrinsic low l/f noise of the HBT and the high Q of the DR contribute to the low phase noise performance. The fabricated DRO exhibits an output power of 1.33 dBm, and an extremely low phase noise of -109 dBc/Hz at 100 kHz and -131 dBc/Hz at ] MHz offset from the 10.75 GHz oscillation frequency.

A3V 10b 33 MHz Low Power CMOS A/D Converter for HDTV Applications (HDTV 응용을 위한 3V 10b 33MHz 저전력 CMOS A/D 변환기)

  • Lee, Kang-Jin;Lee, Seung-Hoon
    • Journal of IKEEE
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    • v.2 no.2 s.3
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    • pp.278-284
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    • 1998
  • This paper describes a l0b CMOS A/D converter (ADC) for HDTV applications. The proposed ADC adopts a typical multi-step pipelined architecture. The proposed circuit design techniques are as fo1lows: A selective channel-length adjustment technique for a bias circuit minimizes the mismatch of the bias current due to the short channel effect by supply voltage variations. A power reduction technique for a high-speed two-stage operational amplifier decreases the power consumption of amplifiers with wide bandwidths by turning on and off bias currents in the suggested sequence. A typical capacitor scaling technique optimizes the chip area and power dissipation of the ADC. The proposed ADC is designed and fabricated in s 0.8 um double-poly double-metal n-well CMOS technology. The measured differential and integral nonlinearities of the prototype ADC show less than ${\pm}0.6LSB\;and\;{\pm}2.0LSB$, respectively. The typical ADC power consumption is 119 mW at 3 V with a 40 MHz sampling rate, and 320 mW at 5 V with a 50 MHz sampling rate.

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A STUDY ON THE ANALYSIS AND DESIGN OF OPERATION AMPLIATION BY USING CMOS (CMOS를 이용한 연산증폭기의 회로 해석 및 설계)

  • Kang, Heau-Jo;Lee, Ju-Hawn;Kim, Kil-Sang;Hong, Sung-Chan;Yoe, Hyun;Choi, Seung-Chul
    • Proceedings of the KIEE Conference
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    • 1987.07a
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    • pp.403-406
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    • 1987
  • CMOS operational amplifier is most useful building bloch in analog circuit. This paper represents the analysis and design method of CMOS OP AMP to use general purpose such as the A/D and D/A converter, PCM encoder and decoder etc. The required specifications is obtained by changing W/L ration of CMOS devices. The design procedure must be iterative in as much as it is almost impossible to relate all specifications simultaneously. This is performanced with IBM-PC XT by using SPICE(SIMULATION PROGRAM WITH INTEGRATED CIRCUIT EMPHASIS)program.

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A Study on Electromagnetic Retarder's Power Recovery System and Regenerating Voltage Control (전자기형 리타더의 전력회수장치 및 회생전압제어에 대한 연구)

  • Jung, Sung-Chul;Ko, Jong-Sun
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.66 no.8
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    • pp.1207-1214
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    • 2017
  • In the case of frequent braking, when driving downhill or long distance, conventional brakes using friction are problematic in braking safety due to brake rupture and fading phenomenon. Therefore auxiliary brakes is essential for heavy vehicles. And several research has been actively conducted to improve energy efficiency by regenerating mechanical energy into electric energy when the vehicles brake. In this paper, a voltage control method is utilized to recover the electric energy generated in the electromagnetic retarder instead of the eddy current. To regenerate the braking energy into the electrical energy, a resonant L-C circuit is configured in the retarder. The retarder can be modeled as self-excited induction generator due to its operating principle. The driving conditions according to the retarder's parameters are made into 3-D maps. Also, the voltage of the resonant circuit changing depending on the driving pulse applied to the FET was analyzed. For the control of this voltage, we proposed an algorithm using the PI controller. The controlled voltage is converted by a 3-phase AC/DC converter and then charged to a battery inside the heavy vehicles through a DC/DC converter. Electromagnetic retarder and its controller are validated using Matlab Simulink. We also demonstrate the voltage controller through the actual M-G set experiment.

The Performance Analysis of the DDFS to drive PLL (PLL을 구동하기 위한 DDFS의 성능분석)

  • 손종원;박창규;김수욱
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.8
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    • pp.1283-1291
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    • 2002
  • In this paper, the PLL driven by the DDFS is designed on the schematic using the Q-logic cell based library and is implemented using FPGA QL32 x16B. The measurement results of the frequency synthesizer switching speed were agreement with a register. The simulated results show that the clock delay was generated after eleven clock and if input is random, It has influence on output DA converter has to be very extensive. Therefore, the DDFS used noise shaper to drive PLL by regular interval for input state. Also the bandwidth of DA converter very extensive, the simulation shows that the variation of small input control word is better than the switching speed of PLL.

Development of a 3 kW Grid-tied PV Inverter With GaN HEMT Considering Thermal Considerations (GaN HEMT를 적용한 3kW급 계통연계 태양광 인버터의 방열 설계 및 개발)

  • Han, Seok-Gyu;Noh, Yong-Su;Hyon, Byong-Jo;Park, Joon-Sung;Joo, Dongmyoung
    • The Transactions of the Korean Institute of Power Electronics
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    • v.26 no.5
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    • pp.325-333
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    • 2021
  • A 3 kW grid-tied PV inverter with Gallium nitride high-electron mobility transistor (GaN HEMT) for domestic commercialization was developed using boost converter and full-bridge inverter with LCL filter topology. Recently, many GaN HEMTs are manufactured as surface mount packages because of their lower parasitic inductance characteristic than standard TO (transistor outline) packages. A surface mount packaged GaN HEMT releases heat through either top or bottom cooling method. IGOT60R070D1 is selected as a key power semiconductor because it has a top cooling method and fairly low thermal resistances from junction to ambient. Its characteristics allow the design of a 3 kW inverter without forced convection, thereby providing great advantages in terms of easy maintenance and high reliability. 1EDF5673K is selected as a gate driver because its driving current and negative voltage output characteristics are highly optimized for IGOT60R070D1. An LCL filter with passive damping resistor is applied to attenuate the switching frequency harmonics to the grid-tied operation. The designed LCL filter parameters are validated with PSIM simulation. A prototype of 3 kW PV inverter with GaN HEMT is constructed to verify the performance of the power conversion system. It achieved high power density of 614 W/L and peak power efficiency of 99% for the boost converter and inverter.