• Proceedings of the Korean Society for Language and Information Conference
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• 2007.11a
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• pp.358-364
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• 2007

Syntax parsers can benefit from speakers' intuition about constituent structures indicated in the input string in the form of parentheses. Focusing on languages like Korean, whose orthographic convention requires more than one word to be written without spaces, we describe an algorithm for passing the bracketing information across the tagger to the probabilistic CFG parser, together with one for heightening (or penalizing, as the case may be) probabilities of putative constituents as they are suggested by the parser. It is shown that two or three constituents marked in the input suffice to guide the parser to the correct parse as the most likely one, even with sentences that are considered long.

• Journal of the Korean Institute of Telematics and Electronics
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• v.13 no.5
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• pp.24-29
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• 1976

In the phase locked AM signal detection, phase locked loop is used to extract a synchronous carrier from an input AM signal. Under the assumption that input noise is white Gaussian and free-running frequency of voltage controlled oscillator is the same that of an input carrier, operational behaviours of phase locked loop is analyzed and signal to noise ratio of the detection is derived quentitatively. The results show that the phase locked AM signal detection method offers a higher degree of noise mmunity than conventional AM signal detections.

• Journal of IKEEE
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• v.22 no.1
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• pp.110-120
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• 2018

In this paper, we apply the input-output linearization technique to tracking the follow-up trajectory r(t) in the ball-beam system. There exist system disturbance and various uncertainties, the conventional input-output linearization based control yields some noticeable errors in tracking performance. As a result, a new robust control technique for the uncertainty of the system was proposed and its improved performance verified through simulation and experimental results. So, more realistic system model is obtained with unmatched uncertainties and disturbance. Then, in order to improve the control performance, a new optimal bang-bang control input is additionally added.

• Journal of KSNVE
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• v.11 no.2
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• pp.257-264
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• 2001

In this research, piezoelectric smart structures are applied for SEA(Statistical Energy Analysis), which is well known approach for high frequency analysis. A new input power measurement based on piezoelectric electrical power measurement is proposed and compared with the conventional method in SEA. As an example, a simple aluminum beam on which piezoelectric actuator is attached is considered. By measuring the electrical impedance and electrical current of the piezoelectric actuator, the electrical power given on the actuator is found and this is In turn converted into the mechanical energy. From the measured value of the stored energy of the beam, the Internal loss factor is calculated and this value shows a good agreement with that given by the conventional method as well as the theoretical value. To compare the coupling loss factor, L-shape beam system which consists of a aluminum beam subsystem and a steel beam subsystem coupled by three pin is taken as second example. The input power and stored energy of each subsystem are found by the proposed approach. The coupling loss factor found by the electrical input power obtained from the piezoelectric actuator exhibits similar trend to the value found by the conventional method as well as the theoretical value. In conclusion, the use of SEA for high frequency application of piezoelectric smart structures is Possible. Especially, the input power that is essential for SEA can be found accurately by measuring the electrical input power of the piezoelectric actuator.

• Journal of Advanced Marine Engineering and Technology
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• v.39 no.10
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• pp.1031-1036
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• 2015

Proportional-integral-derivative (PID) controllers are widely used in industrial sites. Most tuning methods for PID controllers use an empirical and experimental approach; thus, the experience and intuition of a designer greatly affect the tuning of the controller. The representative methods include the closed-loop tuning method of Ziegler-Nichols (Z-N), the C-C tuning method, and the Internal Model Control tuning method. There has been considerable research on the tuning of PID controllers for single-input single-output systems but very little for multi-input multi-output systems. It is more difficult to design PID controllers for multi-input multi-output systems than for single-input single-output systems because there are interactive control loops that affect each other. This paper presents a tuning method for the PID controller for a two-input two-output system. The proposed method uses a real-coded genetic algorithm (RCGA) as an optimization tool, which optimizes the PID controller parameters for minimizing the given objective function. Three types of objective functions are selected for the RCGA, and each PID controller parameter is determined accordingly. The performance of the proposed method is compared with that of the Z-N method, and the validity of the proposed method is examined.

• Journal of Power Electronics
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• v.11 no.4
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• pp.542-550
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• 2011

This paper describes the design and hardware implementation of a Single Input Fuzzy Logic Controller (SIFLC) to regulate the output voltage of a boost power converter. The proposed controller is derived from the signed distance method, which reduces a multi-input conventional Fuzzy Logic Controller (CFLC) to a single input FLC. This allows the rule table to be approximated to a one-dimensional piecewise linear control surface. A MATLAB simulation demonstrated that the performance of a boost converter is identical when subjected to the SIFLC or a CFLC. However, the SIFLC requires nearly an order of magnitude less time to execute its algorithm. Therefore the former can replace the latter with no significant degradation in performance. To validate the feasibility of the SIFLC, a 50W boost converter prototype is built. The SIFLC algorithm is implemented using an Altera FPGA. It was found that the SIFLC with asymmetrical membership functions exhibits an excellent response to load and input reference changes.

• Proceedings of the KIEE Conference
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• 2001.04a
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• pp.240-243
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• 2001

This paper presents the digital controller using variable gain for single-phase power factor correction (PFC) converter. Generally, the gain of inner current control loop in single-stage PFC converter has a constant magnitude. This is why input current is distorted under low input voltage. In particular, a digital controller has more time delay than an analog controller which degrades characteristics of control loop. So, it causes the problem that the gain of current control loop isn't increased enough. In addition, the oscillation happens in the peak value of the input voltage open loop PFC system gain changes according to ac input voltage. These aspects make the design of the digital PFC controller difficult. In this paper, the improved digital control method for single-phase power factor converter is presented. The variable gain according to input voltage and input current help to improve current shape. The 800W converter is manufactured to verify the proposed control method.

• Korean Journal of Computational Design and Engineering
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• v.2 no.2
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• pp.77-84
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• 1997

This paper is concerning the development of multiple neural networks system of problem domains where the complete input space can be decomposed into several different regions, and these are known prior to training neural networks. We will adopt oblique decision tree to represent the divided input space and sel ect an appropriate subnetworks, each of which is trained over a different region of input space. The overall architecture of multiple neural networks system, called the federated architecture, consists of a facilitator, normal subnetworks, and tile networks. The role of a facilitator is to choose the subnetwork that is suitable for the given input data using information obtained from decision tree. However, if input data is close enough to the boundaries of regions, there is a large possibility of selecting the invalid subnetwork due to the incorrect prediction of decision tree. When such a situation is encountered, the facilitator selects a tile network that is trained closely to the boundaries of partitioned input space, instead of a normal subnetwork. In this way, it is possible to reduce the large error of neural networks at zones close to borders of regions. The validation of our approach is examined and verified by applying the federated neural networks system to the configuration design of a midship structure.

• Journal of Power Electronics
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• v.15 no.1
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• pp.10-17
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• 2015

A quasi-constant on-time controlled buck front end in combined discontinuous conduction mode and boundary conduction mode is proposed to improve power factor (PF).When instantaneous AC input voltage is lower than the output bus voltage per period, the buck converter turns into buck-boost converter with the addition of a level comparator to compare input voltage and output voltage. The gate drive voltage is provided by an additional oscillator during distortion time to eliminate the cross-over distortion of the input current. This high PF comes from the avoidance of the input current distortion, thereby enabling energy to be delivered constantly. This paper presents a series analysis of controlling techniques and efficiency, PF, and total harmonic distortion. A comparison in terms of efficiency and PF between the proposed converter and a previous work is performed. The specifications of the converter include the following: input AC voltage is from 90V to 264V, output DC voltage is 80V, and output power is 94W.This converter can achieve PF of 98.74% and efficiency of 97.21% in 220V AC input voltage process.

• Journal of Power Electronics
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• v.15 no.4
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• pp.1085-1092
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• 2015

In this paper, the expressions of the estimated information of a single-phase enhanced phase-locked loop (EPLL), when input signal contains harmonics and a DC offset while the fundamental component takes step changes, are derived. The theoretical analysis results indicate that in the estimated information, the n^th-order harmonics cause n+1^th-order periodic ripples, and the DC offset causes a periodic ripple at the fundamental frequency. Step changes of the amplitude, phase angle and frequency of the fundamental component cause a transient periodic ripple at twice the frequency. These periodic ripples deteriorate the performance of the EPLL. A hybrid filter based EPLL (HF-EPLL) is proposed to eliminate these periodic ripples. A delay signal cancellation filter is set at the input of the EPLL to cancel the DC offset and even-order harmonics. A sliding Goertzel transform-based filter is introduced into the amplitude estimation loop and frequency estimation loop to eliminate the periodic ripples caused by the residual input odd-order harmonics and step change of the input fundamental component. The parameter design rules of the two filters are discussed in detail. Experimental waveforms of both the conventional EPLL and the proposed HF-EPLL are given and compared with each other to verify the theoretical analysis and advantages of the proposed HF-EPLL.