• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1998년도 춘계학술대회 논문집
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• pp.473-476
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• 1998

No Abstract. See Full-text.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권1호
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• pp.52-62
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• 2004

In this paper we look at the effect of Fringe-Enhanced-Barrier-lowering (FEBL) for high-K dielectric MOSFETs and the dependence of FEBL on various technological parameters (spacer dielectrics, overlap length, dielectric stack, S/D junction depth and dielectric thickness). We show that FEBL needs to be contained in order to maintain the performance advantage with scaled high-K dielectric MOSFETs. The degradation in high-K dielectric MOSFETs is also identified as due to the additional coupling between the drain-to-source that occurs through the gate insulator, when the gate dielectric constant is significantly higher than the silicon dielectric constant. The technology parameters required to minimize the coupling through the high-K dielectric are identified. It is also shown that gate dielectric stack with a low-K material as bottom layer (very thin $SiO_2$ or oxy-nitride) will be helpful in minimizing FEBL. The circuit performance issues with high-K MOS transistors are also analyzed in this paper. An optimum range of values for the dielectric constant has been identified from the delay and the energy dissipation point of view. The dependence of the optimum K for different technology generations has been discussed. Circuit models for the parasitic capacitances in high-K transistors, by incorporating the fringing effects, have been presented.

• Journal of the Korean Society for Industrial and Applied Mathematics
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• 제15권1호
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• pp.67-82
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• 2011

Calculation of accurate wall heat flux for high enthalpy flows requires a dense grid system, which leads to significantly large computational time. A high-order scheme can improve the efficiency of calculation because wall heat flux can be obtained accurately even with a relatively coarse grid system. However, conventional high order schemes have some drawbacks such as oscillations near a discontinuity and instability in multi-dimensional problem. To resolve these problems, enhanced Multi-dimensional Limiting Process(e-MLP) was applied as a high-order scheme. It could provide robust and accurate solutions with high order accuracy in calculation of high enthalpy flows within a short time. We could confirm the efficiency of the high order e-MLP scheme through grid convergence tests with different grid densities in a hypersonic blunt nose problem.

• East Asian mathematical journal
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• 제32권1호
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• pp.85-91
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• 2016

In present article, we find a complete classification theorem of links of basket numbers 2 or less. As an application, we study the basket numbers of links of 6 crossings or less.

• 한국지구물리탐사학회:학술대회논문집
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• 한국지구물리탐사학회 2010년도 학술대회 초록집
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• pp.63-66
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• 2010

• Korean Journal of Mathematics
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• 제21권3호
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• pp.311-318
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• 2013

We continue the study of power-Armendariz rings over IFP rings, introducing $k$-power Armendariz rings as a generalization of power-Armendariz rings. Han et al. showed that IFP rings are 1-power Armendariz. We prove that IFP rings are 2-power Armendariz. We moreover study a relationship between IFP rings and $k$-power Armendariz rings under a condition related to nilpotency of coefficients.

• Journal of Electrical Engineering and Technology
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• 제11권3호
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• pp.699-706
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• 2016

Partial discharges (PD) lead to the degradation of high voltage cables and accessories. PD activities occur due to the existence of impurities, voids, contaminants, defects and protrusions during the manufacture and installation of power cables. Commonly, insulation failures occur at cable joints and terminations, caused by inhomogeneous electric field distributions. In this work, a blend of natural rubber (NR) and linear low density polyethylene (LLDPE) was investigated, and the optimal formulation of the blend that could resist PD was discussed. The experiments were conducted under a constant high voltage stress test of 6.5 kV AC and the magnitude of partial discharge activities was recorded using the CIGRE method II. Pattern analysis of PD signals was performed along with the interpretation of morphological changes. The results showed that the addition of 10 wt% of NR and 5 wt% of Alumina Trihydrate (ATH) provided promising results in resisting PD activities. However, as the NR content increased, more micropores existed, thus resulting in increased PD activities within the samples.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2008년도 하계학술대회 논문집
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• pp.580-582
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• 2008

The object of this paper is develope the PC based controlled high voltage power supply and studies 1.2kW(120kV, 10mA) pulse power X-ray generator possible to adapt fluoroscopy of Dental CT X-ray generator and industrial X-ray pulse power equipment. The developed pulse power X-ray generator consisted of mono-block tank include X-ray tube and high voltage X-ray power supply circuit and high voltage control unit with RS232C/422 communication port. The PC control program of pulse power X-ray generator uses LabVIEW, and the size of high voltage transformer and high voltage generator is minimized by high voltage high frequency inverter has 100kHz switching frequency. Also this paper shows result of X-ray tube voltage and tube current correspond to variable load.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1996년도 하계학술대회 논문집 C
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• pp.1828-1830
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• 1996

In this study, We developed the optical fiber incorporated high-voltage underground power cable which is combined optical fibers with conventional high-voltage underground power cable. Optical-Unit that optical fiber is inserted in stainless tube is tested, and we got good results enough to safe optical fibers. Also we put the optical fiber incorporated high-voltage underground power cable to the test of electrical characteristics and optical characteristics, we knew that the electrical characteristics were the same characteristics as conventional high-voltage underground power cable and the transmission loss change was almost zero.

• Journal of Power Electronics
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• 제12권6호
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• pp.947-953
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• 2012

The latch-up immunity of the high voltage power clamps used in high voltage ESD protection devices is very becoming important in high-voltage applications. In this paper, a stacking structure with a high holding voltage and a high failure current is proposed and successfully verified in 0.18um CMOS and 0.35um BCD technology to achieve the desired holding voltage and the acceptable failure current. The experimental results show that the holding voltage of the stacking structure can be larger than the operation voltage of high-voltage applications. Changes in the characteristics of the stacking structure under high temperature conditions (300K-500K) are also investigated.