• Title/Summary/Keyword: Junction Area

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Performance Ratio of Crystalline Si and Triple Junction a-Si Thin Film Photovoltaic Modules for the Application to BIPVs

  • Cha, Hae-Lim;Ko, Jae-Woo;Lim, Jong-Rok;Kim, David-Kwangsoon;Ahn, Hyung-Keun
    • Transactions on Electrical and Electronic Materials
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    • v.18 no.1
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    • pp.30-34
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    • 2017
  • The building integrated photovoltaic system (BIPV) attracts attention with regard to the future of the photovoltaic (PV) industry. It is because one of the promising national and civilian projects in the country. Since land area is limited, there is considerable interest in BIPV systems with a variety of angles and shapes of PV panels. It is therefore expected to be one of the major fields for the PV industry in the future. Since the irradiation is different from each installation angle, the output can be predicted by the angles. This is critical for a PV system to be operated at maximum power and use an efficient design. The development characteristics of tilted angles based on data results obtained via long-term monitoring need to be analyzed. The ratio of the theoretically available and actual outputs is compared with the installation angles of each PV module to provide a suitable PV system for the user.

Electrical and Optical Characterizations of Metal/Semiconductor Contacts for Photovoltaic Applications

  • Kim, Dong-Uk
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2010.05a
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    • pp.11.2-11.2
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    • 2010
  • Photovoltaic devices are promising candidates as affordable and large-area renewable energy sources, which can replace the fossil-fuel-based resources. Especially, thin film solar cells have attracted increasing research attention, since they have a great advantage of low production cost. From the physical point of view, the photovoltaic devices can provide us interesting questions, how to enhance the light absorption and the carrier collection efficiency. A lot of approaches would be possible to address these issues. We have focused on two major topics relevant to photovoltaic device physics; (1) light management using surface plasmons and (2) junction characterizations aiming at proper interface engineering. Regarding the first topic, we have investigated the influences of Ag under-layer morphology on optical properties of ZnO thin films. The experimental results suggested that coupling between the surface plasmon polaritons at the ZnO/Ag interface and excitons in ZnO should play important roles in reflectivity of the ZnO/Ag thin films, which are widely used back reflector structures in thin film solar cells. For the second topic, we have carried out scanning probe microscopy studies of Schottky junctions consisting of photovoltaic materials. Such a research is very helpful to understand the correlation between the defects (e.g., grain boundaries) and local electrical properties. We will introduce some of the recent experimental results and discuss the physical significance.

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Analysis of Accelerated Soft Error Rate for Characteristic Parameters on Static RAM (정적 RAM 특성 요소에 의한 소프트 에러율의 해석)

  • Gong, Myeong-Kook;Wang, Jin-Suk;Kim, Do-Woo
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.55 no.4
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    • pp.199-203
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    • 2006
  • This paper presents an ASER (Accelerated Soft Error Rate) integral model. The model is based on the facts that the generated EHP/s(electron hole pairs) are diminished after some residual range of the incident alpha particle, where residual range is a function of the incident angle and the capping layer thickness over the semiconductor junction. The ASER is influenced by the flux of the alpha particles, the junction area ratio, the alpha particle incident angle when the critical charge is same as the collected charge, and the sizes of the alpha source and the chip. The model was examined with 8M static RAM samples. The measured ASER data showed good agreement with the calculated values using the model. The ASER decreased exponentially with respect to the operational voltage. As the capping layer thickness increases up to $16{\mu}m$, the ASER increases, and after that thickness, the ASER decreases. The ASER increased as the depth of BNW increased from $0{\mu}m\;to\;4{\mu}m$. and then saturated. The ASER decreased as the node capacitance increased from 2fF to 5fF.

DEVELOPMENT OF A FLOOD PROTECTION SYSTEM BY THE USE OF MODEL TESTS

  • Knoblauch Helmut;Goekler Gottfried;Heigerth Guenther
    • Water Engineering Research
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    • v.3 no.1
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    • pp.45-55
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    • 2002
  • The Szentgotthard Flood Protection Project is located in the southeasters part of Austria, very close to the Hungarian border and to the Hungarian town of Szentgotthard situated near the Junction of the rivers Lafnitz and Raab. During heavy rainstorms, this area has always been liable to severe floodings, affecting the town itself and upstream reaches, where major industrial and commercial development is planned. In order to solve these problems, several solutions have been developed by means of a series of model tests performed at the hydraulic laboratory of the Technical University of Graz, Austria. The model was constructed to scales 1:75 (lengths) and 1:25 (heights). This trebled scale allowed greater accuracy in the measurement of discharge depths. The results from the model tests have led to the following proposals: - Construction of a flood relief trough with an inflow section 3.5 km upstream of the junction of the rivers Lafnitz and Raab. - Use of a former river bed for the flood relief trough. - Design of a lowered embankment crest section to pass one-third of the maximum flood flow of the river Lafnitz. - Connection of the flood relief trough to the Lahnbach stream, a tributary of the river Raab.

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Analysis of LED Package Properties by PCB Material and Via-hole Construction (PCB 재질 및 Via hole 구성에 따른 LED 패키지의 특성 분석)

  • Lee, Se-Il;Yang, Jong-Kyung;Kim, Sung-Hyun;Lee, Seung-Min;Park, Dae-Hee
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.59 no.11
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    • pp.2038-2042
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    • 2010
  • In this paper, we confirmed the thermal & optical properties for improving the heat transfer coefficient by changing the via hole size and in FR4 PCB with the same area. Osram 1W power LED Package (Golden Dragon) was used and the K-factor which is relative constant between LED junction temperature and forward bias was measured with power source meter(KEITHLEY 2430) to measure the thermal resistance from PCB configuration. As results, thermal resistance in metal PCB came out to the lowest as $26 [^{\circ}C/W]$ and thermal resistance in FR4 PCB without via-holes emerged as the highest as $69 [^{\circ}C/W]$. However thermal resistance of FR4 PCB could have decreased until $32[^{\circ}C/W]$ in 0.6 mm by using the via hole. Also, the luminous flux could have improved, too.

Contact Area-Dependent Electron Transport in Au/n-type Ge Schottky Junction

  • Kim, Hogyoung;Lee, Da Hye;Myung, Hye Seon
    • Korean Journal of Materials Research
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    • v.26 no.8
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    • pp.412-416
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    • 2016
  • The electrical properties of Au/n-type Ge Schottky contacts with different contact areas were investigated using current-voltage (I-V) measurements. Analyses of the reverse bias current characteristics showed that the Poole-Frenkel effect became strong with decreasing contact area. The contribution of the perimeter current density to the total current density was found to increase with increasing reverse bias voltage. Fitting of the forward bias I-V characteristics by considering various transport models revealed that the tunneling current is dominant in the low forward bias region. The contributions of both the thermionic emission (TE) and the generation-recombination (GR) currents to the total current were similar regardless of the contact area, indicating that these currents mainly flow through the bulk region. In contrast, the contribution of the tunneling current to the total current increased with decreasing contact area. The largest $E_{00}$ value (related to tunneling probability) for the smallest contact area was associated with higher tunneling effect.

A study on the fire smoke diffusion delay strategy in a great depth underground double deck tunnel junction (대심도 복층터널 교차로 화재연기 확산지연 방안 연구)

  • Shin, Tae-Gyun;Moon, Jung-Joo;Yang, Yong-Won;Lee, Yun-Taek;Han, Jae-Hee
    • Journal of Korean Tunnelling and Underground Space Association
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    • v.21 no.1
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    • pp.115-126
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    • 2019
  • Recently, in order to solve the traffic congestion in urban areas and to improve the peripheral environment, research on the design and construction technology development of great depth underground double-deck tunnel is under way by using the underground space in the urban area. The network type double-deck tunnel is in the form of an intersection with a small cross section and a steep slope as per construction at the base of a flatland, so that the fire smoke spreads rapidly in case of fire, which is expected to cause damage of human life. Therefore, this study is analyzed the delay effect of fire smoke diffusion according to the installation and non - installation of delay system for fire smoke diffusion at the intersection. Fire fumes were delayed up to 270 seconds when the delay system for fire smoke diffusion was installed at the intersection and it is analyzed that the greater the operating area of the delay system for fire smoke diffusion, the more preventable the damage of human life of the intersection.

Heat Dissipation Trends in Semiconductors and Electronic Packaging (반도체 및 전자패키지의 방열기술 동향)

  • S.H. Moon;K.S. Choi;Y.S. Eom;H.G. Yun;J.H. Joo;G.M. Choi;J.H. Shin
    • Electronics and Telecommunications Trends
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    • v.38 no.6
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    • pp.41-51
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    • 2023
  • Heat dissipation technology for semiconductors and electronic packaging has a substantial impact on performance and lifespan, but efficient heat dissipation is currently facing limited improvement. Owing to the high integration density in electronic packaging, heat dissipation components must become thinner and increase their performance. Therefore, heat dissipation materials are being devised considering conductive heat transfer, carbon-based directional thermal conductivity improvements, functional heat dissipation composite materials with added fillers, and liquid-metal thermal interface materials. Additionally, in heat dissipation structure design, 3D printing-based complex heat dissipation fins, packages that expand the heat dissipation area, chip embedded structures that minimize contact thermal resistance, differential scanning calorimetry structures, and through-silicon-via technologies and their replacement technologies are being actively developed. Regarding dry cooling using single-phase and phase-change heat transfer, technologies for improving the vapor chamber performance and structural diversification are being investigated along with the miniaturization of heat pipes and high-performance capillary wicks. Meanwhile, in wet cooling with high heat flux, technologies for designing and manufacturing miniaturized flow paths, heat dissipating materials within flow paths, increasing heat dissipation area, and reducing pressure drops are being developed. We also analyze the development of direct cooling and immersion cooling technologies, which are gradually expanding to achieve near-junction cooling.

Developing Design Guidelines for Rest Area Based on the Traffic Safety (교통안전을 고려한 고속도로 휴게소 설계기준 개발)

  • Lee, Hyun-Suk;Lee, Eui-Eun;Seo, Im-Ki;Park, Je-Jin
    • International Journal of Highway Engineering
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    • v.14 no.3
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    • pp.173-182
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    • 2012
  • Entry and exits of the rest area are sections where designed speed can be rapidly change and also a weak traffic safety section. In addition, two tasks can be performed simultaneously at entry of the rest area, particularly searching for deceleration and parking spaces/parking sides etc. Thus, design criteria is required in order to procure the stability of accessed vehicle. In case of Korea, geometric structure design criteria of entry facilities, such as toll-gate, interchange, junction etc was established. However there are no presence in a detailed standards for geometric structure of the rest area which affiliated road facilities. In this study, Derive problems in regards to the entry of geometric structure of resting areas by utilizing a sight survey and an investigation research of traffic accidents. The survey was targeting 135 general service areas. After Classifying the design section of resting areas' entry as well as derive design elements on each section, a speed measurement by targeting entry of rest areas and car behavior surveys were performed, then each element's minimum standard was derived through the analyses. According to the speeds at the starting/end point of entrance connector road, the minimum length of the entrance connector road is decided as 40m using Slowing-down length formula and based on the driving pattern, the range of the junction setting angle of the entrance connector road is defined as $12^{\circ}{\sim}17^{\circ}$. Suggest improvement plans for existing rest areas that can be applied realistically. This should be corresponded to the standards of entry and exit of developed rest areas.

2.4 GHz WLAN InGaP/GaAs Power Amplifier with Temperature Compensation Technique

  • Yoon, Sang-Woong;Kim, Chang-Woo
    • ETRI Journal
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    • v.31 no.5
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    • pp.601-603
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    • 2009
  • This letter presents a high performance 2.4 GHz two-stage power amplifier (PA) operating in the temperature range from $-30^{\circ}C$ to $+85^{\circ}C$ for IEEE 802.11g, wireless local area network application. It is implemented in InGaP/GaAs hetero-junction bipolar transistor technology and has a bias circuit employing a temperature compensation technique for error vector magnitude (EVM) performance. The technique uses a resistor made with a base layer of HBT. The design improves EVM performance in cold temperatures by increasing current. The implemented PA has a dynamic EVM of less than 4%, a gain of over 26 dB, and a current less than 130 mA below the output power of 19 dBm across the temperature range from $-30^{\circ}C$ to $+85^{\circ}C$.