• Title/Summary/Keyword: Josephson Junction

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Fabrication of interface-controlled Josephson Junctions by Ion beam damage

  • 김상협;김준호;성건용
    • Progress in Superconductivity
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    • v.3 no.2
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    • pp.168-171
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    • 2002

  • We have demonstrated ramp-edge Josephson junctions using high temperature superconductors without depositing artificial barriers. We fabricated a surface barrier formed naturally during an ion beam etching process and the annealing under the oxygen atmosphere. The experimental results imply that the barrier natures such as the resistivity are varied by the annealing conditions and the ion milling conditions including the beam voltages. Thus, the ann eating and etching conditions should be optimized to obtain excellent junction properties. In optimizing the fabricating factors, the interface-controlled junctions showed resistively shunted junctions like current-voltage characteristics and an excellent uniformity. These junctions exhibited a spread ($1\sigma$) of $I_{c}$ is 10% fur chips containing 7 junctions at 50K.K.

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Junction, Circuit and System Developments for a High-Tc Superconductor Sampler

  • Hidaka, M.;Satoh, T.;Tahara, S.
    • 한국초전도학회:학술대회논문집
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    • v.9
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    • pp.13-15
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    • 1999

  • A Josephson sampler circuit using high-Tc superconductor (HTS) ramp-edge junctions has been designed, fabricated, and experimentally tested. It consists of five ramp-edge junctions with a stacked groundplane and is based on single-flux-quantum (SFQ) operations. The sampler was used to measure current waveforms at picosecond and microampere resolutions. We are developing a system based on the sampler for measuring the current waveform in a room-temperature sample. And measuring current flowing through wiring in a semiconductor large-scale integrated circuit is a promising application for the HTS sampler system.

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Junction, Circuit and System Developments for a High-$T_c$ Superconductor Sampler

  • Hidaka, M.;Satoh, T.;Tahara, S.
    • Progress in Superconductivity
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    • v.1 no.2
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    • pp.81-84
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    • 2000

  • A Josephson sampler circuit using high-Tc superconductor (HTS) ramp-edge junctions has been designed, fabricated, and experimentally tested. It consists of five ramp-edge junctions with a stacked groundplane and is based on single-flux-quantum (SFQ) operations. The sampler was used to measure current waveforms at picosecond and microampere resolutions. We are developing a system based on the sampler for measuring the current waveform in a room-temperature sample. And measuring current flowing through wiring in a semiconductor large-scale integrated circuit is a promising application for the HTS sampler system.

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Magnetic field behavior of Bi$_2CaCu_2O_{8+{\delta}}$ Intrinsic Josephson Junctions (Bi$_2Sr_2CaCu_2O_{8+{\delta}}$ Intrinsic 조셉슨 접합의 자기장 효과)

  • Lee, Ju-Yeong;Lee, Hyeon-Ju;Chong, Yeon-Uk;Lee, Su-Yeon;Kim, Jeong-Gu
    • 한국초전도학회:학술대회논문집
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    • v.9
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    • pp.178-184
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    • 1999

  • We have measured I-V characteristics of Bi$_2Sr_2CaCu_2O_{8+{\delta}}$ mesa containing a small number of intrinsic stacked Josephson junctions in a magnetic field. We fabricated mesa with an area of 40${\times}$40 ${\mu}$m$^2$ containing 3${\sim}$20 intrinsic junctions. We applied magnetic field perpendicular to He CuO$_2$ planes up to 5T. We observed flux-flow branches and flux-flow steps in the I-V characteristics which might be due to collective motion of Josephson vortices in the long junction limit. In a parallel field, critical current I$_c$ varies as I$_c$(B) ${\sim}$ exp(-B/B$_0$), where B$_0$ is about 2T, which is consistent with the theoretical model. DC and AC intrinsic Josephson effects are also discussed.

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