• Journal of Power Electronics
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• 제19권1호
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• pp.244-253
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• 2019

Finite control set model-predictive control (FCS-MPC) has received increasing attentions due to its outstanding dynamic performance. It is being widely used in power converters and multilevel inverters. However, FCS-MPC requires a lot of calculations, especially for multilevel-cascaded H-bridge (CHB) static synchronous compensators (STATCOMs), since it has to take account of all the feasible voltage vectors of inverters. Hence, an improved five-segment space vector pulse width modulation (SVPWM) method based on the non-orthogonal static reference frames is proposed. The proposed SVPWM method has a lower number of switching states and requires fewer computations than the conventional method. As a result, it makes FCS-MPC more efficient for multilevel cascaded H-bridge STATCOMs. The partial cost function is adopted to sequentially solve for the reference current and capacitor voltage. The proposed FCS-MPC method can reduce the calculation burden of the FCS-MPC strategy, and reduce both the switching frequency and power losses. Simulation and experimental results validate the excellent performance of the proposed method when compared with the conventional approach.

• Journal of Power Electronics
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• 제19권1호
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• pp.158-167
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• 2019

This research comparatively studies three kinds of flux regulation methods, namely, stored capacitor discharge pulse (SCDP), constant current source pulse (CCSP), and quantitative flux regulation pulse (QFRP), which are used for hybrid permanent magnet (PM) axial field flux-switching memory machines (HPM-AFFSMMs). Through an analysis of the operation principle and the series hybrid PM flux regulation mechanism of the objective machine, the circuit topologies and flux regulation process of these flux regulation methods are addressed in detail. On the basis of a simulation, the flux regulation characteristics of the researched machine during the magnetization and demagnetization processes are comparatively evaluated. Then, machine performance, including back EMF, direct and quadrature axis inductances, and magnetization and demagnetization characteristics, is quantitatively investigated. Results show that the QFRP enables the HPM-AFFSMM to achieve a less harmonic component of back EMF by approximately 7.28% and 7.97% at the magnetization and demagnetization states, respectively, and a more complete magnetization process than the SCDP and CCSP.

• Journal of Power Electronics
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• 제19권2호
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• pp.475-486
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• 2019

This paper proposes the modulation and control of a three-to-six-phase matrix converter with an asymmetrical six-phase output. The matrix converter (MC) outputs consist of two sets of three-phase spatially shifted by $30^0$, where the two sets have two isolated neutrals. The space vector approach is considered for the modeling and subsequent modulation of the three-to-six phase MC. The intelligent selection of voltage space vectors is made to synthesize the reference voltages and to obtain a sinusoidal output. The dwell times of selected voltage space vectors are adjusted in such a way that the effect of the second and the third auxiliary plane vectors (i.e., x1-y1, and x2-y2) are nullified. To achieve the maximum output voltage gain and to ensure that no reactive power is drawn from the utility supply, the input side power factor is maintained at unity. Nevertheless, the source side power factor is controllable. The modulation technique is implemented in dSPACE working in conjunction with a FPGA. Hardware results that validate the proposed control algorithm are discussed.

• Journal of Power Electronics
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• 제19권2호
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• pp.519-528
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• 2019

The unified power quality conditioner (UPQC) is an effective custom power device that is used at the point of common coupling to protect loads from voltage and current-related PQ issues. Currently, most researchers have studied series unit and parallel unit models and an idealized transformer model. However, the interactions of the series and parallel converters in AC-link are difficult to analyze. This study utilizes an equivalent transformer model to accomplish an electric connection of series and parallel converters in the AC-link and to establishes a precise unified mathematical model of the UPQC. The strong coupling interactions of series and parallel units are analyzed, and they show a remarkable dependence on the excitation impedance of transformers. Afterward, a feed-forward decoupling method based on a unified model that contains the uncertainty components of the load impedance is applied. Thus, this study presents an adaptive method to estimate load impedance. Furthermore, simulation and experimental results verify the accuracy of the proposed modeling and decoupling algorithm.

• Journal of Power Electronics
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• 제19권2호
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• pp.363-379
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• 2019

Resonant converters have attracted a lot of attention because of their high efficiency due to the soft-switching performance. An isolated high step-up converter with secondary-side resonant loops is proposed and analyzed in this paper. By placing the resonant loops on the secondary side, the current stress for the resonant capacitors is greatly reduced. The power loss caused by the equivalent series resistance of the resonant capacitor is also decreased. Clamp diodes in parallel with the resonant capacitors ensure a unique discontinuous current mode in the converter. Under this mode, the active switches can realize soft-switching during both turn-on and turn-off transitions. Meanwhile, the reverse-recovery problems of diodes are also alleviated by the leakage inductor. The converter is essentially a step-up converter. Therefore, it is helpful for decreasing the transformer turn-ratio when it is applied as a high step-up converter. The steady-state operation principle is analyzed in detail and design considerations are presented in this paper. Theoretical conclusions are verified by experimental results obtained from a 500W prototype with a 35V-42V input and a 400V output.

• Journal of Power Electronics
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• 제19권1호
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• pp.68-78
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• 2019

The emergence of high voltage conversion applications has resulted in a trend of using semiconductor device series associations. Series associations allow for operation at blocking voltages, which are higher than the nominal voltage for each of the semiconductor devices. The main challenge with these topologies is finding a way to guarantee the voltage balance between devices in both blocking and switching transients. Most of the methods that have been proposed to mitigate static and dynamic voltage unbalances result in increased losses within the device. This paper introduces a new series stack topology, where the voltage unbalances are reduced. This in turn, mitigates the switching losses. The proposed topology consists of a circuit that ensures the soft switching of each device, and one auxiliary circuit that allows for switching energy recovery. The principle for the topology operation is presented and experimental tests are performed for two modules. The topology performs excellently for switching transients on each of the devices. The voltage static unbalances were limited to 10%, while the activation/deactivation delay introduced by the lower module IGBT driver takes place in the dynamic unbalances. Thus, the switching losses are reduced by 40%, when compared to hard switching configurations.

• Journal of Power Electronics
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• 제19권2호
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• pp.333-343
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• 2019

Dead time and the nonideal characteristics of components all lead to phase voltage distortions. In order to eliminate the harmful effects caused by distortion, numerous methods have been proposed. The efficacy of a method mainly depends on two factors, the compensation voltage amplitude and the phase current polarity. Theoretical derivations and experiments are given to explain that both of these key factors can be deduced from the compensation time, which is defined as the error time between the ideal phase voltage duration and the actual phase voltage duration in one Pulse Width Modulation (PWM) period. Based on this regularity, a novel method for compensating phase voltage has been proposed. A simple circuit is constructed to realize the real-time feedback of the phase voltage. Utilizing the actual phase voltage, the compensation time is calculated online. Then the compensation voltage is derived. Simulation and experimental results show the feasibility and effectivity of the proposed method. They also show that the error voltage is decreased and that the waveform is improved.

• Journal of Power Electronics
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• 제19권2호
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• pp.487-496
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• 2019

For a solid-state transformer (SST), some factors, such as signal delay, switching loss and differences in the system parameters, lead to unbalanced DC-link voltages among the cascaded H-bridges (CHB). With a control method implemented in the ${\alpha}{\beta}$ frame, the DC-link voltages are balanced, and the reactive power is equally distributed among all of the H-bridges. Based on the ${\alpha}{\beta}$ frame control, the system can achieve independent active current and reactive current control. In addition, the control method of the high-voltage stage is easy to implement without decoupling or a phase-locked loop. Furthermore, the method can eliminate additional current delays during transients and get the dynamic response rapidly without an imaginary current component. In order to carry out the controller design, the vector refactoring relations that are used to balance DC-link voltages are derived. Different strategies are discussed and simulated under the unbalanced load condition. Finally, a three-cell CHB rectifier is constructed to conduct further research, and the steady and transient experimental results verify the effectiveness and correctness of the proposed method.

• Journal of Power Electronics
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• 제19권2호
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• pp.529-539
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• 2019

The modular multilevel converter (MMC) has become a promising topology for high-voltage direct current (HVDC) transmission systems. To control a MMC system properly, the ac-side current, circulating current and submodule (SM) capacitor voltage are taken into consideration. This paper proposes a low-computation indirect model predictive control (IMPC) strategy that takes advantages of the conventional MPC and has no weighting factors. The cost function and duty cycle are introduced to minimize the tracking error of the ac-side current and to eliminate the circulating current. An optimized merge sort (OMS) algorithm is applied to keep the SM capacitor voltages balanced. The proposed IMPC strategy effectively reduces the controller complexity and computational burden. In this paper, a discrete-time mathematical model of a MMC system is developed and the duty ratio of switching state is designed. In addition, a simulation of an eleven-level MMC system based on MATLAB/Simulink and a five-level experimental setup are built to evaluate the feasibility and performance of the proposed low-computation IMPC strategy.

• Journal of Power Electronics
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• 제19권1호
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• pp.278-287
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• 2019

In this study, a zero-crossing spike current issue in a totem-pole bridgeless power factor correction (PFC) converter is comprehensively investigated for the first time. Spike current occurs when input voltage crosses zero, becomes a noise source, and causes severe common mode emission issues. A generation mechanism for electromagnetic interference (EMI) is presented to investigate the EMI problem caused by zero-crossing issue, and a noise spectrum due to this issue is predicted by a theoretical analysis based on the Fourier coefficient of an approximate spike current waveform. Furthermore, a noise reduction method is proposed and then improved to reduce the spike current. Experimental measurements are implemented on a GaN-based totem-pole bridgeless PFC converter, and the spike current can be effectively suppressed through the proposed method. Furthermore, the noise spectrums measured without and with the reduced zero-crossing spike current are compared. Experimental results validate the analysis of the noise spectrum caused by the zero-crossing spike current issue.