• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.5
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• pp.33-40
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• 1998

In this paper, a design of current-mode continuous-time filters for low voltage and low frequency applications using complementary bipolar current mirrors is presented. The proposed current-mode filters consist of simple bipolar current mirrors and capacitors and are quite suitable for monolithic integration. Since the design method of the proposed current-mode filters are based on the integrator type of realization, it can be used for a wide range of applications. Since the input impedance of simple bipolar current mirror is small, in this paper, negative feedback amplifier is used to realize is designed by cascade method. The cutoff frequency of the designed filter can be easily tunable by the DC controlling current from 60kHz to 120kHz. The characteristics of the designed current-mode filters are simulated and examined by SPICE using standard bipolar transistor parameters.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.9
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• pp.21-27
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• 1997

Square spiral inductors are designed with EM program in accordance with the inner diameter and the metal thickness which is 0.2.mu.m and 20.mu.m respectively. We propose a parameter extraction method based on the S-parameter. Lumped equivalent circuits of spiral inductors are analyed with reflection coefficient S$_{11}$, of witch freqency rnage is 1~10GHz. When metal thickness is 0.2.mu.m, S$_{11}$ with EM simulation is not the same as S$_{11}$ that of SPICE simulation. So we suggests a new lumped equivalent circuits which compensate circuits. Te new lumped equivalent circuits are adequate for other inductor with small scale at high frequencies.ncies.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.4
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• pp.116-126
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• 1994

In this paper, the switch-level fault simulator for CMOS circuits with a gate-to-drain/source short fault is implemented. A fault model used in this paper is based on the graphical analysis of the electrical characteristics of the faulty MOS devices and the conversion of the faulty CMOS circuit to the equivalent faulty CMOS inverter in order to find its effect on the successive stage. This technique is very simple and has the increased accuracy of the simulation. The simulation result of the faulty circuit using the implemented fault simulator is compared with the result of the SPICE simulation.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.563-566
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• 1988

A current-controlled CMOS operational transconductance amplifier(OTA), whose transconductance is directly proportional to the DC bias current, has been developed for many electronic circuit applications. It features that its transconductance is insensitive to temperature unlike that of the bipolar OTA. This property makes it possible to use the proposed OTA as a basic buliding block in electrically variable circuit design. The SPICE simulation shows that the conversion sensitivity of the circuit is 44.62 mv /${\mu}A$ and the linearity error less than 0.54 % over a bias current range from 2 ${\mu}A$ to 120 ${\mu}A$ when the output is loaded with a 1${\Omega}$ resistor.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.55 no.3
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• pp.182-188
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• 2006

Contactless power system is base on power transmission by magnetic force. The transformer loss is large because it separated with the gap. Also the system has unstable factor, since the parameters in the secondary can vary with the system movement. This paper proposes light train power transmission system using contactless transformer with multiple primary winding. To increase the system efficiency and to obtain the stable power transmission to the dynamic load, a resonant inverter is adopted. The proposed system was verified by the simulation using Spice and Maxwell. The designed contactless power transmission system is implemented for 5[kW] class and experimental results are discussed.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.43 no.4
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• pp.672-678
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• 1994

A design of 5th-order Elliptic OTA-C filter for operation at 4.2MHz is presented. the filter structure is composed entirely of five OTAs(Operational transoonductance Amplifiers), one buffer and seven capacitors. To prevent decreasing of frequency charaoteristios due to the parasitic effeots of OTA and buffer, the design considering of parasitic capacitance and finite resistane of OTA and fuffer is pertormed. As the result of the simulation using SPICE with $2{\mu}m$ CMOS parameters, The performances were found to be essentially within the specifications` less than 0.25dB passband attenuation, 30dB stopband attenuation and 4.2MHz cut-off frequency were satisfactorily obtained. The number of elements is also considerably reduced than other design methods.

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.1017-1020
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• 2000

In this paper, a CNN using 1-dimensional chaos circuits with controllable nonlinear functions is proposed. The proposed CNN consists of $\p{times}q$ chaos circuits which are called cell circuits. The nonlinear functions of the cell circuits can be controlled by employing fuzzy scheme. Thanks to the controllability of the nonlinear functions, the proposed circuit can adjust transition behavior of the CNN electronically. Furthermore, the chaotic behavior of the cell circuit which is a portion of the proposed CNN is simple since the cell circuit is a 1-dimensional chaos circuit. To confirm the validity of the circuit design, SPICE simulations were performed concerning the proposed CNN.

• Proceedings of the KIEE Conference
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• 1987.07a
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• pp.403-406
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• 1987

CMOS operational amplifier is most useful building bloch in analog circuit. This paper represents the analysis and design method of CMOS OP AMP to use general purpose such as the A/D and D/A converter, PCM encoder and decoder etc. The required specifications is obtained by changing W/L ration of CMOS devices. The design procedure must be iterative in as much as it is almost impossible to relate all specifications simultaneously. This is performanced with IBM-PC XT by using SPICE(SIMULATION PROGRAM WITH INTEGRATED CIRCUIT EMPHASIS)program.

• Proceedings of the KIEE Conference
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• 1993.07a
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• pp.450-452
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• 1993

In this study, a method is suggested to design the A/D conversion system which has high resolution to convert load cell signal. First, hardware was designed to reduce the offset voltage of integrator and comparator. And then, a calibration software technique was performed to obtain the stable data from A/D converter. The optimal parameters of each elements in the circuits was selected using the SPICE simulation. The main advantage of our method is high precision A/D converter can be constructed with low cost and high confidence. Therefore proposed method is expected to be used in the industrial field where a high precision measurement is required.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.11
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• pp.1-10
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• 1993

This paper proposes a High Performance Full-Swing BiCMOS (HiF-BiCMOS) circuit which improves on the conventional BiCMOS circuit. The HiF-BiCMOS circuit has all the merits of the conventional BiCMOS circuit and can realize full-swing logic operation. Especially, the speed of full-swing logic operation is much faster than that of conventional full-swing BiCMOS circuit. And the number of transistors added in the HiF-BiCMOS for full-swing logic operation is constant regardless of the number of logic gate inputs. The HiF-BiCMOS circui has high stability to variation of environment factors such as temperature. Also, it has a preamorphized Si layer was changed into the perfect crystal Si after the RTA. Remarkable scalability for power supply voltage according to the development of VLSI technology. The power dissipation of HiF-BiCMOS is very small and hardly increases about a large fanout. Though the Spice simulation, the validity of the proposed circuit design is proved.