• Journal of the Korean institute of surface engineering
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• v.39 no.5
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• pp.235-239
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• 2006

The aluminum nitride(AlN) layer on Al7075 substrate has been formed through nitrogen ion implantation process. The implantation process was performed under the conditions : 100 keV energy, total ion dose up to $2{\times}10^{18}\;ions/cm^2$. XRD analysis showed that aluminum nitride layers were formed by nitrogen implantation. The formation of Aluminum nitride enhanced surface hardness up to 265HK(0.02 N) from 150HK(0.02 N) for the unimplanted specimen. Micro-Knoop hardness test showed that wear resistance was improved about 2 times for nitrogen implanted specimens above $5\;{\times}\;10^{17}\;ions/cm^2$. The friction coefficient was measured by Ball-on-disc type wear tester and was decreased to 1/3 with increasing total nitrogen ion dose up to $1\;{\times}\;10^{18}ions/cm^2$. The enhancement of mechanical properties was observed to be closely associated with AlN formation. AES analysis showed that the maximum concentration of nitrogen increased as ion dose increased until $5\;{\times}\;10^{17}\;ions/cm^2$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.12
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• pp.750-758
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• 2016

For the channel doping of shallow junction and retrograde well formation in CMOS, indium can be implanted in silicon. The retrograde doping profiles can serve the needs of channel engineering in deep MOS devices for punch-through suppression and threshold voltage control. Indium is heavier element than B, $BF_2$ and Ga ions. It also has low coefficient of diffusion at high temperatures. Indium ions can be cause the erode of wafer surface during the implantation process due to sputtering. For the ultra shallow junction, indium ions can be implanted for p-doping in silicon. UT-MARLOWE and SRIM as Monte carlo ion-implant models have been developed for indium implantation into single crystal and amorphous silicon, respectively. An analytical tool was used to carry out for the annealing process from the extracted simulation data. For the 1D (one-dimensional) and 2D (two-dimensional) diffused profiles, the analytical model is also developed a simulation program with $C^{{+}{+}}$ code. It is very useful to simulate the indium profiles in implanted and annealed silicon autonomously. The fundamental ion-solid interactions and sputtering effects of ion implantation are discussed and explained using SRIM and T-dyn programs. The exact control of indium doping profiles can be suggested as a future technology for the extreme shallow junction in the fabrication process of integrated circuits.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.21 no.5
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• pp.34-39
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• 2022

The ion implantation technology changes the chemical state of the surface of a material by implanting ions on the surface. It improves the wear resistance, friction characteristics, etc. Plasma ion implantation can effectively reinforce a surface by implanting a sufficient amount of plasma nitrogen ions and using the injection depth instead of an ion beam. As plasma ion implantation is a three-dimensional process, it can be applied even when the surface area is large and the surface shape is complicated. Furthermore, it is less expensive than competing PVD and CVD technologies. and the material is The accommodation range for the shape and size of the plasma is extremely large. In this study, we improved wear resistance by implanting plasma nitrogen ions into a carbide end mill tool, which is frequently used in high-speed machining

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.5
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• pp.32-44
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• 1997

A three-dimensional (3D) full-dynamic damage model for ion implantation in crystalline silicon was proposed to calculate more accurately point defect distributions and ion-implanted concentration profiles during ion implantation process. The developed model was based on the physical monte carlo approach. This model was applied to simulate B and BF2 implantation. We compared our results for damage distributions with those of the analytical kinchin-pease approach. In our result, the point defect distributions obtained by our new model are less than those of kinchin-pease approach, and the vacancy distributions differ from the interstitial distributions. The vacancy concentrations are higher than the interstitial ones before 0.8 . Rp to the silicon surface, and after the 0.8 . Rp to the silicon bulk, the interstitial concentrations are revesrsely higher than the vacancy ones.The fully-dynamic damage model for the accumulative damage during ion implantation follows all of the trajectories of both ions and recoiled silicons and, concurrently, the cumulative damage effect on the ions and the recoiled silicons are considered dynamically by introducing the distributon probability of the point defect. In addition, the self-annealing effect of the vacancy-interstitial recombination during ion implantation at room temperature is considered, which resulted in the saturation level for the damage distribution.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.8
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• pp.609-615
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• 2011

This paper is studied for the improvement of the characteristics of gate oxide with 3-nm-thick gate oxide by deuterium ion implantation methode. Deuterium ions were implanted to account for the topography of the overlaying layers and placing the D peak at the top of gate oxide. A short anneal at forming gas to nitrogen was performed to remove the damage of D-implantation. We simulated the deuterium ion implantation to find the optimum condition by SRIM (stopping and range of ions in matter) tool. We got the optimum condition by the results of simulation. We compare the electrical characteristics of the optimum condition with others terms. We also analyzed the electrical characteristics to change the annealing conditions after deuterium ion implantation. The results of the analysis, the breakdown time of the gate oxide was prolonged in the optimum condition. And a variety of annealing, we realized the dielectric property that annealing is good at longer time. However, the high temperature is bad because of thermal stress.

• Proceedings of the KSME Conference
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• 2004.04a
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• pp.956-960
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• 2004

Effects of ion implantation and deposition on the tribological properties of DLC film as a function of implanted energies and process times were investigated. TiC ions were implanted and deposited on the Si-wafer substrates followed by DLC coating using ion beam deposition method. In order to study tribological properties such as friction coefficient and behavior of DLC film on the modified surface as a function of implanted energies and process times, we used a ball-on-disc type apparatus in the atmospheric environment. From results of wear test, as the implanted energy was increased, the friction coefficient was more stable below 0.1.

• Tribology and Lubricants
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• v.20 no.3
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• pp.145-151
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• 2004

A modified surface layer by ion implantation is very thin (under 1 $\mu\textrm{m}$) but has superior mechanical characteristics. therefore ion implantation has been used successfully as a surface treatment technology to improve the wear, fatigue, and corrosion resistances of materials. MEVVA which is a kind of ion beam apparatus has merits of low cost and is usable to various metals, but occurs a droplet ranging from micron to tens of micron on the implanted surface at ion implantations. wear is a dynamic phenomenon on interacting surfaces with rotative motion. Since wear changes in condition of the surface, we should control to surface. In order to improve a wear resistance of Ti ion implanted 1C-3Cr steel(material for roller in the cold working process), it is essential to investigate the effect of the droplets on the wear characteristics. In this study, we investigate the effect of the droplets on the wear characteristics of 1C-3Cr steel using SEM Tribosystem as in-situ system. Results show that the droplet occurred at ion implantation becomes the cause of severe wear. Therefore, the ion-implanted surface should be removed the droplet to improve wear resistance.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.155.2-155.2
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• 2013

Strain-relaxed SiGe layer on Si substrate has numerous potential applications for electronic and opto- electronic devices. SiGe layer must have a high degree of strain relaxation and a low dislocation density. Conventionally, strain-relaxed SiGe on Si has been manufactured using compositionally graded buffers, in which very thick SiGe buffers of several micrometers are grown on a Si substrate with Ge composition increasing from the Si substrate to the surface. In this study, a new plasma process, i.e., the combination of PIII&D and HiPIMS, was adopted to implant Ge ions into Si wafer for direct formation of SiGe layer on Si substrate. Due to the high peak power density applied the Ge sputtering target during HiPIMS operation, a large fraction of sputtered Ge atoms is ionized. If the negative high voltage pulse applied to the sample stage in PIII&D system is synchronized with the pulsed Ge plasma, the ion implantation of Ge ions can be successfully accomplished. The PIII&D system for Ge ion implantation on Si (100) substrate was equipped with 3'-magnetron sputtering guns with Ge and Si target, which were operated with a HiPIMS pulsed-DC power supply. The sample stage with Si substrate was pulse-biased using a separate hard-tube pulser. During the implantation operation, HiPIMS pulse and substrate's negative bias pulse were synchronized at the same frequency of 50 Hz. The pulse voltage applied to the Ge sputtering target was -1200 V and the pulse width was 80 usec. While operating the Ge sputtering gun in HiPIMS mode, a pulse bias of -50 kV was applied to the Si substrate. The pulse width was 50 usec with a 30 usec delay time with respect to the HiPIMS pulse. Ge ion implantation process was performed for 30 min. to achieve approximately 20 % of Ge concentration in Si substrate. Right after Ge ion implantation, ~50 nm thick Si capping layer was deposited to prevent oxidation during subsequent RTA process at $1000^{\circ}C$ in N2 environment. The Ge-implanted Si samples were analyzed using Auger electron spectroscopy, High-resolution X-ray diffractometer, Raman spectroscopy, and Transmission electron microscopy to investigate the depth distribution, the degree of strain relaxation, and the crystalline structure, respectively. The analysis results showed that a strain-relaxed SiGe layer of ~100 nm thickness could be effectively formed on Si substrate by direct Ge ion implantation using the newly-developed PIII&D process for non-gaseous elements.

• Journal of the Korean institute of surface engineering
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• v.23 no.1
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• pp.1-7
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• 1990

Ion implantation is a well established superior superior surface modification technique for the improvement of wear resistance, hardenece, hardness, corrosion resistance, biocompaibity, surface friction, as well as for the modification of surface electric conductance. Conventional ion implantaion is a line-of-sight process witch ues the ion beam accelerator techniques. Plasma sheath ion implantation (PSII), as a new technique, is described in this paper. In PSII high voltage pulse is applied to a target material placed directly in a plasma, forming a think ion-matrix sheath around the target. Ions accelerate through the sheath drop and bombard the traget from all sides simultaneosuslyregardless of the target shape. This paper describes the principle of PSII, which has non-line-of sight characteristics, as well as the experimental appratus.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.5 no.4
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• pp.331-335
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• 2004

In this paper, we modeling the oxidation, diffusion, and ion-implantation for semiconductor process simulation, and construct the integrated framework for efficient execution and continuous process simulation. For oxidation process, to predict the accurate LOCOS shape and stress distributions, stress-dependent viscous model was performed using SVP algorithm. For diffusion process, predeposition and OED simulation was performed using point defect theory. For ion implantation, Monte-Carlo method based on TRIM simulation was performed with various process conditions. For input to each unit process, we used the dialog boxes which are windows application's standards. This dialog box allows us to verify and minimize input error at input steps. Using the combination of compiler's function and windows's API function, simulation was done with small memory size.