• The Transactions of the Korean Institute of Electrical Engineers P
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• v.65 no.4
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• pp.303-308
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• 2016

A light-emitting diode (LED) has been increasingly applied to various industrial fields and general lightings because of its high efficiency, low power consumption, environment-friendly characteristic and long lifetime. To drive this LED lighting, various types of power converters have been applied. Also, power factor correction (PFC) techniques play an important role in the power supply technology. In this paper, design and control of a DCM interleaved boost PFC converter is discussed. The proposed converter can reduce current ripples at input and output side by cancelling an each phase of inductor currents. Since the IC does not require the auxiliary winding of inductor for current detection, simple PFC circuit is achieved. Therefore, it contributes to increase efficiency and downsize the whole system volume, cost. Also, the performance of the proposed system is demonstrated through experiments.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.9
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• pp.1306-1314
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• 2015

This paper deals with a switching method of a three-phase interleaved bidirectional DC-DC converter to obtain high efficiency in wide load range. The proposed soft-switching method provides ZVS and ZCS at turn-on, and ZVS at turn-off of the switch as well as considerably reduced conduction loss in light load. Simulation and experiment are carried out with a bidirectional DC-DC converter having the power rating of 3 [kW], and those results show the validity of the proposed switching method.

• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.403-404
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• 2013

In this paper, a PCS which consists of high boost interleaved full-bridge converter and single phase half-bridge inverter is proposed. Proposed PCS is using two full bridge converter modules. PCS consists of parallel input / serial output. It can reduce turn ratio of high frequency transformer. In this paper, PCS which is using 1.5[kW] interleaved full-bridge converter and single phase half bridge inverter is designed and verified stability of system through experiment.

• Journal of Electrical Engineering and Technology
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• v.5 no.2
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• pp.319-328
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• 2010

In this paper, an optimal selection methodology for the number of phases will be proposed for an interleaved boost converter (IBC). Also, the analysis of the input current ripple according to CCM and DCM is carried out. The proposed design methodology will be theoretically analyzed, and its validity verified by simulation as well as with experimental results. Moreover, a comparison of cost and efficiency based on a 600W laboratory prototype using the Ballard NEXA 1.2kW PEMFC system is demonstrated.

• The Transactions of the Korean Institute of Power Electronics
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• v.13 no.4
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• pp.257-262
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• 2008

This paper studies the operational characteristics of Multi-Phase Interleaved Boost converter operating in Boundary Conduction Mode. The generalized transfer functions of interest are derived from the full-order averaged model approach and then the steady-state and dynamic characteristics are analyzed. The theoretical results are verified through an experimental prototype of the 800W boost PFC converter for 60inch PDP power module.

• Journal of Electrical Engineering and Technology
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• v.9 no.5
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• pp.1632-1642
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• 2014

This paper presents an interleaved resonant converter to reduce the voltage stress of power MOSFETs and achieve high circuit efficiency. Two half-bridge converters are connected in series at high voltage side to limit MOSFETs at $V_{in}/2$ voltage stress. Flying capacitor is used between two series half-bridge converters to balance two input capacitor voltages in each switching cycle. Variable switching frequency scheme is used to control the output voltage. The resonant circuit is operated at the inductive load. Thus, the input current of the resonant circuit is lagging to the fundamental input voltage. Power MOSFETs can be turn on under zero voltage switching. Two resonant circuits are connected in parallel to reduce the current stress of transformer windings and rectifier diodes at low voltage side. Interleaved pulse-width modulation is adopted to decrease the output ripple current. Finally, experiments are presented to demonstrate the performance of the proposed converter.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.2
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• pp.123-130
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• 2007

This paper presents the generalized and explicit expressions for evaluating the performance of the multi-phase interleaved buck converter (IBC) operating in discontinuous inductor current mode (DICM). The full-order averaged model is derived. The generalized transfer functions of interest are presented and the dynamic characteristics are analyzed. The generalized analysis of converter performance is verified through the experimental and simulation results.

• Journal of Electrical Engineering and Technology
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• v.12 no.4
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• pp.1529-1536
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• 2017

A digital dual-channel interleaved phase-shift full-bridge converter is investigated in this paper, and its topology and principle are analyzed. To realize current sharing and stabilize the output voltage, a controller with current sharing loop and closed voltage loop is employed. In addition, current sharing will increase the output current fluctuation and a new digital interleaved driving technology is proposed to reduce the output current ripple. To verify the analysis, simulation and experiments are carried out, which shows the effectiveness of the proposed control strategies.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.10
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• pp.600-608
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• 2016

This paper proposes a new high-efficient interleaved phase-shift full-bridge (PSFB) converter for low-voltage and high-current power systems. The proposed converter is composed of three switch-bridges and two transformers in the primary side and two rectifiers in the secondary side. Each transformer handles half of the total power with an interleaved operation, so that the proposed converter has high system reliability, as much as the conventional interleaved PSFB converter. The soft-switching characteristics of the proposed converter are better than those of the conventional converter due to the modulated primary side configuration. The proposed converter represents a single lagging-leg bridge, which has a poor soft switching condition in its operation, while the conventional converter has two lagging-leg bridges in its operation. Therefore, the number of switches having hard-switching conditions is reduced by half in the proposed converter. In addition, the reduced switch counts in the primary side of the proposed converter helps decrease the complexity of the proposed converter compared to that of the conventional converter. The operational principle and analysis are presented in this paper and the characteristics are verified using a PSIM simulation with 3kW server power specification.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.626-628
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• 2004

This paper describes an 8-bit CMOS folding A/D converter for set-top box. Modular low-power, high-speed CMOS A/D converter for embedded systems aims at design techniques for low-power, high-speed A/D converter processed by the standard CMOS technology. The time-interleaved A/D converter or flash A/D converter are not suitable for the low-power applications. The two-step or multi-step flash A/D converters need a high-speed SHA, which represents a tough task in high-speed analog circuit design. On the other hand, the folding A/D converter is suitable for the low-power, high-speed applications(Embedded system). The simulation results illustrate a conversion rate of 40MSamples/s and a Power dissipation of 80mW(only analog block) at 2.5V supply voltage.